From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1251) id 6A0CA3858C60; Fri, 15 Oct 2021 18:10:52 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 6A0CA3858C60 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Roger Sayle To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-4449] Allow early sets of SSE hard registers from standard_sse_constant_p. X-Act-Checkin: gcc X-Git-Author: Roger Sayle X-Git-Refname: refs/heads/master X-Git-Oldrev: 2c564e813c0626802e5bfb066c094933d5e6a774 X-Git-Newrev: 730f52e05a1fb5c8cd92e352e9b191a6332be5c2 Message-Id: <20211015181052.6A0CA3858C60@sourceware.org> Date: Fri, 15 Oct 2021 18:10:52 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 15 Oct 2021 18:10:52 -0000 https://gcc.gnu.org/g:730f52e05a1fb5c8cd92e352e9b191a6332be5c2 commit r12-4449-g730f52e05a1fb5c8cd92e352e9b191a6332be5c2 Author: Roger Sayle Date: Fri Oct 15 19:09:25 2021 +0100 Allow early sets of SSE hard registers from standard_sse_constant_p. My previous patch, which was intended to reduce the differences seen by the combination of -march=cascadelake and -m32, has additionally found some more instances where this combination behaves differently to regular x86_64-pc-linux-gnu. The middle-end always, and backends usually, use emit_move_insn to emit/expand move instructions allowing the backend control over placing things in constant pools, adding REG_EQUAL notes, and so on. Several of the AVX512 built-in expanders bypass this logic, and instead generate moves directly using emit_insn(gen_rtx_SET (dst,src)). For example, i386-expand.c line 12004 contains: for (i = 0; i < 8; i++) emit_insn (gen_rtx_SET (xmm_regs[i], const0_rtx)); I suspect that in this case, loading of standard_sse_constant_p, my change to require loading of likely spilled hard registers via a pseudo is perhaps overly strict, so this patch/fix reallows these immediate constants values to be loaded directly prior to reload. 2021-10-15 Roger Sayle gcc/ChangeLog * config/i386/i386.c (ix86_hardreg_mov_ok): For vector modes, allow standard_sse_constant_p immediate constants. Diff: --- gcc/config/i386/i386.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index fb656094e9e..9cc903e826b 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -19303,7 +19303,9 @@ ix86_hardreg_mov_ok (rtx dst, rtx src) /* Avoid complex sets of likely_spilled hard registers before reload. */ if (REG_P (dst) && HARD_REGISTER_P (dst) && !REG_P (src) && !MEM_P (src) - && !x86_64_immediate_operand (src, GET_MODE (dst)) + && !(VECTOR_MODE_P (GET_MODE (dst)) + ? standard_sse_constant_p (src, GET_MODE (dst)) + : x86_64_immediate_operand (src, GET_MODE (dst))) && ix86_class_likely_spilled_p (REGNO_REG_CLASS (REGNO (dst))) && !reload_completed) return false;