From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 03BE73858D39; Thu, 21 Oct 2021 00:37:54 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 03BE73858D39 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work071)] Revert patches. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work071 X-Git-Oldrev: de2c9a286a44b76c7d68424f0018a252dfe7608c X-Git-Newrev: 72eb78e13a4ff90aa3b1b7d2384fae076e639d32 Message-Id: <20211021003754.03BE73858D39@sourceware.org> Date: Thu, 21 Oct 2021 00:37:54 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Oct 2021 00:37:54 -0000 https://gcc.gnu.org/g:72eb78e13a4ff90aa3b1b7d2384fae076e639d32 commit 72eb78e13a4ff90aa3b1b7d2384fae076e639d32 Author: Michael Meissner Date: Wed Oct 20 20:37:15 2021 -0400 Revert patches. 2021-10-20 Michael Meissner gcc/ Revert patches. * config/rs6000/predicates.md (easy_fp_constant): Add support for generating XXSPLTIW. (vsx_prefixed_constant): Likewise. (easy_vector_constant): Likewise. * config/rs6000/rs6000-protos.h (constant_generates_xxspltiw): New declaration. * config/rs6000/rs6000.c (xxspltib_constant_p): If we can generate XXSPLTIW, don't do XXSPLTIB and sign extend. (output_vec_const_move): Add support for XXSPLTIW. (prefixed_xxsplti_p): Recognize XXSPLTIW instructions as prefixed. (constant_generates_xxspltiw): New function. * config/rs6000/rs6000.md (UNSPEC_XXSPLTIW_CONST): New unspec. (xxspltiw__internal): New insns. (VSX prefixed constant splitter): Add XXSPLTIW support. * config/rs6000/rs6000.opt (-msplat-word-constant): New debug switch. * config/rs6000/vsx.md (vsx_mov_64bit): Update comment. (vsx_mov_32bit): Likewise. gcc/testsuite/ Revert patches. * gcc.target/powerpc/vec-splat-constant-v16qi.c: New test. * gcc.target/powerpc/vec-splat-constant-v4sf.c: New test. * gcc.target/powerpc/vec-splat-constant-v4si.c: New test. * gcc.target/powerpc/vec-splat-constant-v8hi.c: New test. * gcc.target/powerpc/vec-splati-runnable.c: Update insn count. Diff: --- gcc/config/rs6000/predicates.md | 11 +--- gcc/config/rs6000/rs6000-protos.h | 1 - gcc/config/rs6000/rs6000.c | 49 ---------------- gcc/config/rs6000/rs6000.md | 17 ------ gcc/config/rs6000/rs6000.opt | 4 -- .../gcc.target/powerpc/vec-splat-constant-v16qi.c | 27 --------- .../gcc.target/powerpc/vec-splat-constant-v4sf.c | 67 ---------------------- .../gcc.target/powerpc/vec-splat-constant-v4si.c | 51 ---------------- .../gcc.target/powerpc/vec-splat-constant-v8hi.c | 62 -------------------- .../gcc.target/powerpc/vec-splati-runnable.c | 2 +- 10 files changed, 2 insertions(+), 289 deletions(-) diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 4b07850eb64..fefa420ed67 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -608,9 +608,6 @@ { if (constant_generates_xxspltidp (&vsx_const)) return true; - - if (constant_generates_xxspltiw (&vsx_const)) - return true; } /* Otherwise consider floating point constants hard, so that the @@ -623,7 +620,7 @@ ;; Return 1 if the operand is a 64-bit floating point scalar constant or a ;; vector constant that can be loaded to a VSX register with one prefixed -;; instruction, such as XXSPLTIDP or XXSPLTIW. +;; instruction, such as XXSPLTIDP. ;; ;; In addition regular constants, we also recognize constants formed with the ;; VEC_DUPLICATE insn from scalar constants. @@ -654,9 +651,6 @@ if (constant_generates_xxspltidp (&vsx_const)) return true; - if (constant_generates_xxspltiw (&vsx_const)) - return true; - return false; }) @@ -712,9 +706,6 @@ { if (constant_generates_xxspltidp (&vsx_const)) return true; - - if (constant_generates_xxspltiw (&vsx_const)) - return true; } if (TARGET_P9_VECTOR diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index 0b93bc3cc0e..ec4f78d9241 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -259,7 +259,6 @@ typedef struct { extern bool constant_to_bytes (rtx, machine_mode, rs6000_const *, rs6000_const_splat); extern unsigned constant_generates_xxspltidp (rs6000_const *); -extern unsigned constant_generates_xxspltiw (rs6000_const *); #endif /* RTX_CODE */ #ifdef TREE_CODE diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 4f24d9491da..b041db3c728 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -6939,11 +6939,6 @@ xxspltib_constant_p (rtx op, else if (IN_RANGE (value, -1, 0)) *num_insns_ptr = 1; - /* If we can generate XXSPLTIW or XXSPLTIDP, don't generate XXSPLTIB and a - sign extend operation. */ - else if (vsx_prefixed_constant (op, mode)) - return false; - else *num_insns_ptr = 2; @@ -7007,13 +7002,6 @@ output_vec_const_move (rtx *operands) operands[2] = GEN_INT (imm); return "xxspltidp %x0,%2"; } - - imm = constant_generates_xxspltiw (&vsx_const); - if (imm) - { - operands[2] = GEN_INT (imm); - return "xxspltiw %x0,%2"; - } } } @@ -26781,9 +26769,6 @@ prefixed_xxsplti_p (rtx_insn *insn) { if (constant_generates_xxspltidp (&vsx_const)) return true; - - if (constant_generates_xxspltiw (&vsx_const)) - return true; } return false; @@ -29020,40 +29005,6 @@ constant_generates_xxspltidp (rs6000_const *vsx_const) return sf_value; } -/* Determine if a vector constant can be loaded with XXSPLTIW. Return zero if - the XXSPLTIW instruction cannot be used. Otherwise return the immediate - value to be used with the XXSPLTIW instruction. */ - -unsigned -constant_generates_xxspltiw (rs6000_const *vsx_const) -{ - if (!TARGET_SPLAT_WORD_CONSTANT || !TARGET_PREFIXED || !TARGET_VSX) - return 0; - - if (!vsx_const->all_words_same) - return 0; - - /* If we can use XXSPLTIB, don't generate XXSPLTIW. */ - if (vsx_const->all_bytes_same) - return 0; - - /* See if we can use VSPLTISH or VSPLTISW. */ - if (vsx_const->all_half_words_same) - { - unsigned short h_word = vsx_const->half_words[0]; - short sign_h_word = ((h_word & 0xffff) ^ 0x8000) - 0x8000; - if (EASY_VECTOR_15 (sign_h_word)) - return 0; - } - - unsigned int word = vsx_const->words[0]; - int sign_word = ((word & 0xffffffff) ^ 0x80000000) - 0x80000000; - if (EASY_VECTOR_15 (sign_word)) - return 0; - - return vsx_const->words[0]; -} - struct gcc_target targetm = TARGET_INITIALIZER; diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 3c94e547939..2633ad9f815 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -157,7 +157,6 @@ UNSPEC_HASHST UNSPEC_HASHCHK UNSPEC_XXSPLTIDP_CONST - UNSPEC_XXSPLTIW_CONST ]) ;; @@ -8233,15 +8232,6 @@ [(set_attr "type" "vecperm") (set_attr "prefixed" "yes")]) -(define_insn "xxspltiw__internal" - [(set (match_operand:SFDF 0 "register_operand" "=wa") - (unspec:SFDF [(match_operand:SI 1 "c32bit_cint_operand" "n")] - UNSPEC_XXSPLTIW_CONST))] - "TARGET_POWER10" - "xxspltiw %x0,%1" - [(set_attr "type" "vecperm") - (set_attr "prefixed" "yes")]) - (define_split [(set (match_operand:SFDF 0 "vsx_register_operand") (match_operand:SFDF 1 "vsx_prefixed_constant"))] @@ -8262,13 +8252,6 @@ DONE; } - imm = constant_generates_xxspltiw (&vsx_const); - if (imm) - { - emit_insn (gen_xxspltiw__internal (dest, GEN_INT (imm))); - DONE; - } - else gcc_unreachable (); }) diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index ec607a7aee7..429da57d19d 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -644,10 +644,6 @@ msplat-float-constant Target Var(TARGET_SPLAT_FLOAT_CONSTANT) Init(1) Save Generate (do not generate) code that uses the XXSPLTIDP instruction. -msplat-word-constant -Target Var(TARGET_SPLAT_WORD_CONSTANT) Init(1) Save -Generate (do not generate) code that uses the XXSPLTIW instruction. - -param=rs6000-density-pct-threshold= Target Undocumented Joined UInteger Var(rs6000_density_pct_threshold) Init(85) IntegerRange(0, 100) Param When costing for loop vectorization, we probably need to penalize the loop body diff --git a/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v16qi.c b/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v16qi.c deleted file mode 100644 index 2707d86e6fd..00000000000 --- a/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v16qi.c +++ /dev/null @@ -1,27 +0,0 @@ -/* { dg-do compile } */ -/* { dg-require-effective-target power10_ok } */ -/* { dg-options "-mdejagnu-cpu=power10 -O2 -mxxspltiw" } */ - -#include - -/* Test whether XXSPLTIW is generated for V16HI vector constants where the - first 4 elements are the same as the next 4 elements, etc. */ - -vector unsigned char -v16qi_const_1 (void) -{ - return (vector unsigned char) { 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, }; /* VSLTPISB. */ -} - -vector unsigned char -v16qi_const_2 (void) -{ - return (vector unsigned char) { 1, 2, 3, 4, 1, 2, 3, 4, - 1, 2, 3, 4, 1, 2, 3, 4, }; /* XXSPLTIW. */ -} - -/* { dg-final { scan-assembler-times {\mxxspltiw\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mvspltisb\M|\mxxspltib\M} 1 } } */ -/* { dg-final { scan-assembler-not {\mlxvx?\M} } } */ -/* { dg-final { scan-assembler-not {\mplxv\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v4sf.c b/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v4sf.c deleted file mode 100644 index 05d4ee3f5cb..00000000000 --- a/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v4sf.c +++ /dev/null @@ -1,67 +0,0 @@ -/* { dg-do compile } */ -/* { dg-require-effective-target power10_ok } */ -/* { dg-options "-mdejagnu-cpu=power10 -O2 -mxxspltiw" } */ - -#include - -/* Test whether XXSPLTIW is generated for V4SF vector constants. */ - -vector float -v4sf_const_1 (void) -{ - return (vector float) { 1.0f, 1.0f, 1.0f, 1.0f }; /* XXSPLTIW. */ -} - -vector float -v4sf_const_nan (void) -{ - return (vector float) { __builtin_nanf (""), - __builtin_nanf (""), - __builtin_nanf (""), - __builtin_nanf ("") }; /* XXSPLTIW. */ -} - -vector float -v4sf_const_inf (void) -{ - return (vector float) { __builtin_inff (), - __builtin_inff (), - __builtin_inff (), - __builtin_inff () }; /* XXSPLTIW. */ -} - -vector float -v4sf_const_m0 (void) -{ - return (vector float) { -0.0f, -0.0f, -0.0f, -0.0f }; /* XXSPLTIB/VSLW. */ -} - -vector float -v4sf_splats_1 (void) -{ - return vec_splats (1.0f); /* XXSPLTIW. */ -} - -vector float -v4sf_splats_nan (void) -{ - return vec_splats (__builtin_nanf ("")); /* XXSPLTIW. */ -} - -vector float -v4sf_splats_inf (void) -{ - return vec_splats (__builtin_inff ()); /* XXSPLTIW. */ -} - -vector float -v8hi_splats_m0 (void) -{ - return vec_splats (-0.0f); /* XXSPLTIB/VSLW. */ -} - -/* { dg-final { scan-assembler-times {\mxxspltiw\M} 6 } } */ -/* { dg-final { scan-assembler-times {\mxxspltib\M} 2 } } */ -/* { dg-final { scan-assembler-times {\mvslw\M} 2 } } */ -/* { dg-final { scan-assembler-not {\mlxvx?\M} } } */ -/* { dg-final { scan-assembler-not {\mplxv\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v4si.c b/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v4si.c deleted file mode 100644 index da909e948b2..00000000000 --- a/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v4si.c +++ /dev/null @@ -1,51 +0,0 @@ -/* { dg-do compile } */ -/* { dg-require-effective-target power10_ok } */ -/* { dg-options "-mdejagnu-cpu=power10 -O2 -mxxspltiw" } */ - -#include - -/* Test whether XXSPLTIW is generated for V4SI vector constants. We make sure - the power9 support (XXSPLTIB/VEXTSB2W) is not done. */ - -vector int -v4si_const_1 (void) -{ - return (vector int) { 1, 1, 1, 1 }; /* VSLTPISW. */ -} - -vector int -v4si_const_126 (void) -{ - return (vector int) { 126, 126, 126, 126 }; /* XXSPLTIW. */ -} - -vector int -v4si_const_1023 (void) -{ - return (vector int) { 1023, 1023, 1023, 1023 }; /* XXSPLTIW. */ -} - -vector int -v4si_splats_1 (void) -{ - return vec_splats (1); /* VSLTPISW. */ -} - -vector int -v4si_splats_126 (void) -{ - return vec_splats (126); /* XXSPLTIW. */ -} - -vector int -v8hi_splats_1023 (void) -{ - return vec_splats (1023); /* XXSPLTIW. */ -} - -/* { dg-final { scan-assembler-times {\mxxspltiw\M} 4 } } */ -/* { dg-final { scan-assembler-times {\mvspltisw\M} 2 } } */ -/* { dg-final { scan-assembler-not {\mxxspltib\M} } } */ -/* { dg-final { scan-assembler-not {\mvextsb2w\M} } } */ -/* { dg-final { scan-assembler-not {\mlxvx?\M} } } */ -/* { dg-final { scan-assembler-not {\mplxv\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v8hi.c b/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v8hi.c deleted file mode 100644 index 290e05d4a64..00000000000 --- a/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v8hi.c +++ /dev/null @@ -1,62 +0,0 @@ -/* { dg-do compile } */ -/* { dg-require-effective-target power10_ok } */ -/* { dg-options "-mdejagnu-cpu=power10 -O2 -mxxspltiw" } */ - -#include - -/* Test whether XXSPLTIW is generated for V8HI vector constants. We make sure - the power9 support (XXSPLTIB/VUPKLSB) is not done. */ - -vector short -v8hi_const_1 (void) -{ - return (vector short) { 1, 1, 1, 1, 1, 1, 1, 1 }; /* VSLTPISH. */ -} - -vector short -v8hi_const_126 (void) -{ - return (vector short) { 126, 126, 126, 126, - 126, 126, 126, 126 }; /* XXSPLTIW. */ -} - -vector short -v8hi_const_1023 (void) -{ - return (vector short) { 1023, 1023, 1023, 1023, - 1023, 1023, 1023, 1023 }; /* XXSPLTIW. */ -} - -vector short -v8hi_splats_1 (void) -{ - return vec_splats ((short)1); /* VSLTPISH. */ -} - -vector short -v8hi_splats_126 (void) -{ - return vec_splats ((short)126); /* XXSPLTIW. */ -} - -vector short -v8hi_splats_1023 (void) -{ - return vec_splats ((short)1023); /* XXSPLTIW. */ -} - -/* Test that we can optimiza V8HI where all of the even elements are the same - and all of the odd elements are the same. */ -vector short -v8hi_const_1023_1000 (void) -{ - return (vector short) { 1023, 1000, 1023, 1000, - 1023, 1000, 1023, 1000 }; /* XXSPLTIW. */ -} - -/* { dg-final { scan-assembler-times {\mxxspltiw\M} 5 } } */ -/* { dg-final { scan-assembler-times {\mvspltish\M} 2 } } */ -/* { dg-final { scan-assembler-not {\mxxspltib\M} } } */ -/* { dg-final { scan-assembler-not {\mvupklsb\M} } } */ -/* { dg-final { scan-assembler-not {\mlxvx?\M} } } */ -/* { dg-final { scan-assembler-not {\mplxv\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-splati-runnable.c b/gcc/testsuite/gcc.target/powerpc/vec-splati-runnable.c index 6c01666b625..5f84930e1a7 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-splati-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-splati-runnable.c @@ -149,7 +149,7 @@ main (int argc, char *argv []) return 0; } -/* { dg-final { scan-assembler-times {\mxxspltiw\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mxxspltiw\M} 2 } } */ /* { dg-final { scan-assembler-times {\mxxspltidp\M} 3 } } */ /* { dg-final { scan-assembler-times {\mxxsplti32dx\M} 3 } } */