From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1012) id 9BD2D385840A; Wed, 3 Nov 2021 17:47:11 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9BD2D385840A MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Vladimir Makarov To: gcc-cvs@gcc.gnu.org Subject: [gcc r11-9202] [PR102842] Consider all outputs in generation of matching reloads X-Act-Checkin: gcc X-Git-Author: Vladimir N. Makarov X-Git-Refname: refs/heads/releases/gcc-11 X-Git-Oldrev: d60e310a4b58c713c204060db439451d90b54c47 X-Git-Newrev: 41bea618a77dca8c1c13a3d7b883976a25d83373 Message-Id: <20211103174711.9BD2D385840A@sourceware.org> Date: Wed, 3 Nov 2021 17:47:11 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Nov 2021 17:47:11 -0000 https://gcc.gnu.org/g:41bea618a77dca8c1c13a3d7b883976a25d83373 commit r11-9202-g41bea618a77dca8c1c13a3d7b883976a25d83373 Author: Vladimir N. Makarov Date: Tue Oct 26 14:03:42 2021 -0400 [PR102842] Consider all outputs in generation of matching reloads Without considering all output insn operands (not only processed before), in rare cases LRA can use the same hard register for different outputs of the insn on different assignment subpasses. The patch fixes the problem. gcc/ChangeLog: PR rtl-optimization/102842 * lra-constraints.c (match_reload): Ignore out in checking values of outs. (curr_insn_transform): Collect outputs before doing reloads of operands. gcc/testsuite/ChangeLog: PR rtl-optimization/102842 * g++.target/arm/pr102842.C: New test. Diff: --- gcc/lra-constraints.c | 17 +++++------------ gcc/testsuite/g++.target/arm/pr102842.C | 30 ++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+), 12 deletions(-) diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index aaacc4eabed..da84466917d 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -1102,7 +1102,7 @@ match_reload (signed char out, signed char *ins, signed char *outs, for (i = 0; outs[i] >= 0; i++) { rtx other_out_rtx = *curr_id->operand_loc[outs[i]]; - if (REG_P (other_out_rtx) + if (outs[i] != out && REG_P (other_out_rtx) && (regno_val_use_in (REGNO (in_rtx), other_out_rtx) != NULL_RTX)) { @@ -4388,7 +4388,10 @@ curr_insn_transform (bool check_only_p) } n_outputs = 0; - outputs[0] = -1; + for (i = 0; i < n_operands; i++) + if (curr_static_id->operand[i].type == OP_OUT) + outputs[n_outputs++] = i; + outputs[n_outputs] = -1; for (i = 0; i < n_operands; i++) { int regno; @@ -4463,8 +4466,6 @@ curr_insn_transform (bool check_only_p) lra-lives.c. */ match_reload (i, goal_alt_matched[i], outputs, goal_alt[i], &before, &after, TRUE); - outputs[n_outputs++] = i; - outputs[n_outputs] = -1; } continue; } @@ -4642,14 +4643,6 @@ curr_insn_transform (bool check_only_p) process_alt_operands decides that it is possible. */ gcc_unreachable (); - /* Memorise processed outputs so that output remaining to be processed - can avoid using the same register value (see match_reload). */ - if (curr_static_id->operand[i].type == OP_OUT) - { - outputs[n_outputs++] = i; - outputs[n_outputs] = -1; - } - if (optional_p) { rtx reg = op; diff --git a/gcc/testsuite/g++.target/arm/pr102842.C b/gcc/testsuite/g++.target/arm/pr102842.C new file mode 100644 index 00000000000..a2bac66091a --- /dev/null +++ b/gcc/testsuite/g++.target/arm/pr102842.C @@ -0,0 +1,30 @@ +/* PR rtl-optimization/102842 */ +/* { dg-do compile } */ +/* { dg-options "-fPIC -O2 -fno-omit-frame-pointer -mthumb -march=armv7-a+fp" } */ + +struct Plane { + using T = float; + T *Row(); +}; +using ImageF = Plane; +long long Mirror_x; +struct EnsurePaddingInPlaceRowByRow { + void Process() { + switch (strategy_) { + case kSlow: + float *row = img_.Row(); + long long xsize = x1_; + while (Mirror_x >= xsize) + if (Mirror_x) + Mirror_x = 2 * xsize - 1; + *row = Mirror_x; + } + } + ImageF img_; + unsigned x1_; + enum { kSlow } strategy_; +}; +void FinalizeImageRect() { + EnsurePaddingInPlaceRowByRow ensure_padding; + ensure_padding.Process(); +}