From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7808) id 1B08E3858401; Mon, 8 Nov 2021 02:55:40 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1B08E3858401 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: HaoChen Gui To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-4987] Disables gimple folding for VSX_BUILTIN_XVMINDP, VSX_BUILTIN_XVMAXDP, ALTIVEC_BUILTIN_VMINFP and ALTI X-Act-Checkin: gcc X-Git-Author: Haochen Gui X-Git-Refname: refs/heads/master X-Git-Oldrev: ae1de0bf72fca92f94a7e29f51ce4448b877db4a X-Git-Newrev: 14e355df30534b1d07018e2934948a09fa5a8e52 Message-Id: <20211108025540.1B08E3858401@sourceware.org> Date: Mon, 8 Nov 2021 02:55:40 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Nov 2021 02:55:40 -0000 https://gcc.gnu.org/g:14e355df30534b1d07018e2934948a09fa5a8e52 commit r12-4987-g14e355df30534b1d07018e2934948a09fa5a8e52 Author: Haochen Gui Date: Tue Nov 2 14:09:32 2021 +0800 Disables gimple folding for VSX_BUILTIN_XVMINDP, VSX_BUILTIN_XVMAXDP,ALTIVEC_BUILTIN_VMINFP and ALTIVEC_BUILTIN_VMAXFP when fast-math is not set. gcc/ * config/rs6000/rs6000-call.c (rs6000_gimple_fold_builtin): Disable gimple fold for VSX_BUILTIN_XVMINDP, ALTIVEC_BUILTIN_VMINFP, VSX_BUILTIN_XVMAXDP, ALTIVEC_BUILTIN_VMAXFP when fast-math is not set. gcc/testsuite/ * gcc.target/powerpc/vec-minmax-1.c: New test. * gcc.target/powerpc/vec-minmax-2.c: Likewise. Diff: --- gcc/config/rs6000/rs6000-call.c | 18 ++++++++- gcc/testsuite/gcc.target/powerpc/vec-minmax-1.c | 53 +++++++++++++++++++++++++ gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c | 51 ++++++++++++++++++++++++ 3 files changed, 120 insertions(+), 2 deletions(-) diff --git a/gcc/config/rs6000/rs6000-call.c b/gcc/config/rs6000/rs6000-call.c index 7121e50e6b7..c7fdf729d8d 100644 --- a/gcc/config/rs6000/rs6000-call.c +++ b/gcc/config/rs6000/rs6000-call.c @@ -12536,6 +12536,14 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) return true; /* flavors of vec_min. */ case VSX_BUILTIN_XVMINDP: + case ALTIVEC_BUILTIN_VMINFP: + { + lhs = gimple_call_lhs (stmt); + tree type = TREE_TYPE (lhs); + if (HONOR_NANS (type)) + return false; + gcc_fallthrough (); + } case P8V_BUILTIN_VMINSD: case P8V_BUILTIN_VMINUD: case ALTIVEC_BUILTIN_VMINSB: @@ -12544,7 +12552,6 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) case ALTIVEC_BUILTIN_VMINUB: case ALTIVEC_BUILTIN_VMINUH: case ALTIVEC_BUILTIN_VMINUW: - case ALTIVEC_BUILTIN_VMINFP: arg0 = gimple_call_arg (stmt, 0); arg1 = gimple_call_arg (stmt, 1); lhs = gimple_call_lhs (stmt); @@ -12554,6 +12561,14 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) return true; /* flavors of vec_max. */ case VSX_BUILTIN_XVMAXDP: + case ALTIVEC_BUILTIN_VMAXFP: + { + lhs = gimple_call_lhs (stmt); + tree type = TREE_TYPE (lhs); + if (HONOR_NANS (type)) + return false; + gcc_fallthrough (); + } case P8V_BUILTIN_VMAXSD: case P8V_BUILTIN_VMAXUD: case ALTIVEC_BUILTIN_VMAXSB: @@ -12562,7 +12577,6 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) case ALTIVEC_BUILTIN_VMAXUB: case ALTIVEC_BUILTIN_VMAXUH: case ALTIVEC_BUILTIN_VMAXUW: - case ALTIVEC_BUILTIN_VMAXFP: arg0 = gimple_call_arg (stmt, 0); arg1 = gimple_call_arg (stmt, 1); lhs = gimple_call_lhs (stmt); diff --git a/gcc/testsuite/gcc.target/powerpc/vec-minmax-1.c b/gcc/testsuite/gcc.target/powerpc/vec-minmax-1.c new file mode 100644 index 00000000000..3f6e3760075 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-minmax-1.c @@ -0,0 +1,53 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-O2 -mdejagnu-cpu=power9" } */ +/* { dg-final { scan-assembler-times {\mxvmaxdp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxvmaxsp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxvmindp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxvminsp\M} 1 } } */ + +/* This test verifies that float or double vec_min/max are bound to + xv[min|max][d|s]p instructions when fast-math is not set. */ + + +#include + +#ifdef _BIG_ENDIAN + const int PREF_D = 0; +#else + const int PREF_D = 1; +#endif + +double vmaxd (double a, double b) +{ + vector double va = vec_promote (a, PREF_D); + vector double vb = vec_promote (b, PREF_D); + return vec_extract (vec_max (va, vb), PREF_D); +} + +double vmind (double a, double b) +{ + vector double va = vec_promote (a, PREF_D); + vector double vb = vec_promote (b, PREF_D); + return vec_extract (vec_min (va, vb), PREF_D); +} + +#ifdef _BIG_ENDIAN + const int PREF_F = 0; +#else + const int PREF_F = 3; +#endif + +float vmaxf (float a, float b) +{ + vector float va = vec_promote (a, PREF_F); + vector float vb = vec_promote (b, PREF_F); + return vec_extract (vec_max (va, vb), PREF_F); +} + +float vminf (float a, float b) +{ + vector float va = vec_promote (a, PREF_F); + vector float vb = vec_promote (b, PREF_F); + return vec_extract (vec_min (va, vb), PREF_F); +} diff --git a/gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c b/gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c new file mode 100644 index 00000000000..b27bebba846 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-minmax-2.c @@ -0,0 +1,51 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-O2 -mdejagnu-cpu=power9 -ffast-math" } */ +/* { dg-final { scan-assembler-times {\mxsmaxcdp\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mxsmincdp\M} 2 } } */ + +/* This test verifies that float or double vec_min/max can be converted + to scalar comparison when fast-math is set. */ + + +#include + +#ifdef _BIG_ENDIAN + const int PREF_D = 0; +#else + const int PREF_D = 1; +#endif + +double vmaxd (double a, double b) +{ + vector double va = vec_promote (a, PREF_D); + vector double vb = vec_promote (b, PREF_D); + return vec_extract (vec_max (va, vb), PREF_D); +} + +double vmind (double a, double b) +{ + vector double va = vec_promote (a, PREF_D); + vector double vb = vec_promote (b, PREF_D); + return vec_extract (vec_min (va, vb), PREF_D); +} + +#ifdef _BIG_ENDIAN + const int PREF_F = 0; +#else + const int PREF_F = 3; +#endif + +float vmaxf (float a, float b) +{ + vector float va = vec_promote (a, PREF_F); + vector float vb = vec_promote (b, PREF_F); + return vec_extract (vec_max (va, vb), PREF_F); +} + +float vminf (float a, float b) +{ + vector float va = vec_promote (a, PREF_F); + vector float vb = vec_promote (b, PREF_F); + return vec_extract (vec_min (va, vb), PREF_F); +}