From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1130) id E3A6B385803D; Tue, 30 Nov 2021 09:53:41 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E3A6B385803D MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Richard Sandiford To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-5608] vect: Fix vect_is_reduction X-Act-Checkin: gcc X-Git-Author: Richard Sandiford X-Git-Refname: refs/heads/master X-Git-Oldrev: 0fb2ab504067ad0d2179622861dd71140b736afe X-Git-Newrev: 9b577047eec65936a5299cac13dd7b73cdfc4ae4 Message-Id: <20211130095341.E3A6B385803D@sourceware.org> Date: Tue, 30 Nov 2021 09:53:41 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Nov 2021 09:53:42 -0000 https://gcc.gnu.org/g:9b577047eec65936a5299cac13dd7b73cdfc4ae4 commit r12-5608-g9b577047eec65936a5299cac13dd7b73cdfc4ae4 Author: Richard Sandiford Date: Tue Nov 30 09:52:27 2021 +0000 vect: Fix vect_is_reduction The current definition of vect_is_reduction (provided for target costing) misses some pattern statements. gcc/ * tree-vectorizer.h (vect_is_reduction): Use STMT_VINFO_REDUC_IDX. gcc/testsuite/ * gcc.target/aarch64/sve/cost_model_13.c: New test. Diff: --- gcc/testsuite/gcc.target/aarch64/sve/cost_model_13.c | 16 ++++++++++++++++ gcc/tree-vectorizer.h | 3 +-- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/gcc.target/aarch64/sve/cost_model_13.c b/gcc/testsuite/gcc.target/aarch64/sve/cost_model_13.c new file mode 100644 index 00000000000..95f2ce91f80 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/cost_model_13.c @@ -0,0 +1,16 @@ +/* { dg-options "-O3 -mtune=neoverse-v1" } */ + +int +f11 (short *restrict x, int n) +{ + short res = 0; + for (int i = 0; i < n; ++i) + res += x[i]; + return res; +} + +/* We should use SVE rather than Advanced SIMD. */ +/* { dg-final { scan-assembler {\tld1h\tz[0-9]+\.h,} } } */ +/* { dg-final { scan-assembler {\tadd\tz[0-9]+\.h,} } } */ +/* { dg-final { scan-assembler-not {\tldr\tq[0-9]+,} } } */ +/* { dg-final { scan-assembler-not {\tv[0-9]+\.8h,} } } */ diff --git a/gcc/tree-vectorizer.h b/gcc/tree-vectorizer.h index 0eb13d6cc74..76e81ea546a 100644 --- a/gcc/tree-vectorizer.h +++ b/gcc/tree-vectorizer.h @@ -2372,8 +2372,7 @@ vect_is_store_elt_extraction (vect_cost_for_stmt kind, stmt_vec_info stmt_info) inline bool vect_is_reduction (stmt_vec_info stmt_info) { - return (STMT_VINFO_REDUC_DEF (stmt_info) - || VECTORIZABLE_CYCLE_DEF (STMT_VINFO_DEF_TYPE (stmt_info))); + return STMT_VINFO_REDUC_IDX (stmt_info) >= 0; } /* If STMT_INFO describes a reduction, return the vect_reduction_type