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From: Kyrylo Tkachov <ktkachov@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-5935] aarch64: Add command-line support for Armv8.8-a Date: Mon, 13 Dec 2021 15:18:50 +0000 (GMT) [thread overview] Message-ID: <20211213151850.E54513857C77@sourceware.org> (raw) https://gcc.gnu.org/g:5954b4d415f6424f1232c6b22a772ce184773f54 commit r12-5935-g5954b4d415f6424f1232c6b22a772ce184773f54 Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com> Date: Mon Dec 13 14:15:16 2021 +0000 aarch64: Add command-line support for Armv8.8-a This final patch in the series is much simpler and adds command-line support for -march=armv8.8-a, making use of the +mops features added in the previous patches. Bootstrapped and tested on aarch64-none-linux-gnu. gcc/ChangeLog: * config/aarch64/aarch64-arches.def (armv8.8-a): Define. * config/aarch64/aarch64.h (AARCH64_FL_V8_8): Define. (AARCH64_FL_FOR_ARCH8_8): Define. * doc/invoke.texi: Document -march=armv8.8-a. Diff: --- gcc/config/aarch64/aarch64-arches.def | 1 + gcc/config/aarch64/aarch64.h | 5 +++++ gcc/doc/invoke.texi | 4 +++- 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/gcc/config/aarch64/aarch64-arches.def b/gcc/config/aarch64/aarch64-arches.def index a3b32e07367..1b5f062694b 100644 --- a/gcc/config/aarch64/aarch64-arches.def +++ b/gcc/config/aarch64/aarch64-arches.def @@ -38,6 +38,7 @@ AARCH64_ARCH("armv8.4-a", generic, 8_4A, 8, AARCH64_FL_FOR_ARCH8_4) AARCH64_ARCH("armv8.5-a", generic, 8_5A, 8, AARCH64_FL_FOR_ARCH8_5) AARCH64_ARCH("armv8.6-a", generic, 8_6A, 8, AARCH64_FL_FOR_ARCH8_6) AARCH64_ARCH("armv8.7-a", generic, 8_7A, 8, AARCH64_FL_FOR_ARCH8_7) +AARCH64_ARCH("armv8.8-a", generic, 8_8A, 8, AARCH64_FL_FOR_ARCH8_8) AARCH64_ARCH("armv8-r", generic, 8R , 8, AARCH64_FL_FOR_ARCH8_R) AARCH64_ARCH("armv9-a", generic, 9A , 9, AARCH64_FL_FOR_ARCH9) diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 2478d0db290..5a590aaa3fb 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -243,6 +243,9 @@ extern unsigned aarch64_architecture_version; /* Hardware memory operation instructions. */ #define AARCH64_FL_MOPS (1ULL << 44) +/* Armv8.8-a architecture extensions. */ +#define AARCH64_FL_V8_8 (1ULL << 45) + /* Has FP and SIMD. */ #define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD) @@ -269,6 +272,8 @@ extern unsigned aarch64_architecture_version; | AARCH64_FL_I8MM | AARCH64_FL_BF16) #define AARCH64_FL_FOR_ARCH8_7 \ (AARCH64_FL_FOR_ARCH8_6 | AARCH64_FL_V8_7 | AARCH64_FL_LS64) +#define AARCH64_FL_FOR_ARCH8_8 \ + (AARCH64_FL_FOR_ARCH8_7 | AARCH64_FL_V8_8 | AARCH64_FL_MOPS) #define AARCH64_FL_FOR_ARCH8_R \ (AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_V8_R) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 2424a5bf3e0..221c7c3ea48 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -18853,6 +18853,7 @@ and the features that they enable by default: @item @samp{armv8.5-a} @tab Armv8.5-A @tab @samp{armv8.4-a}, @samp{+sb}, @samp{+ssbs}, @samp{+predres} @item @samp{armv8.6-a} @tab Armv8.6-A @tab @samp{armv8.5-a}, @samp{+bf16}, @samp{+i8mm} @item @samp{armv8.7-a} @tab Armv8.7-A @tab @samp{armv8.6-a}, @samp{+ls64} +@item @samp{armv8.8-a} @tab Armv8.8-a @tab @samp{armv8.7-a}, @samp{+mops} @item @samp{armv9-a} @tab Armv9-A @tab @samp{armv8.5-a}, @samp{+sve}, @samp{+sve2} @item @samp{armv8-r} @tab Armv8-R @tab @samp{armv8-r} @end multitable @@ -19146,7 +19147,8 @@ Enable the 64-byte atomic load and store instructions for accelerators. This option is enabled by default for @option{-march=armv8.7-a}. @item mops Enable the instructions to accelerate memory operations like @code{memcpy}, -@code{memmove}, @code{memset}. +@code{memmove}, @code{memset}. This option is enabled by default for +@option{-march=armv8.8-a} @item flagm Enable the Flag Manipulation instructions Extension. @item pauth
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