From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2064) id 94BE03858415; Tue, 21 Dec 2021 03:50:02 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 94BE03858415 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Xiong Hu Luo To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-6084] rs6000: Replace UNSPECS with ss_plus/us_plus and ss_minus/us_minus X-Act-Checkin: gcc X-Git-Author: Xionghu Luo X-Git-Refname: refs/heads/master X-Git-Oldrev: 7631a4d1de0e7105be5de29766454270b9820448 X-Git-Newrev: 460d53f816fe30093653cb22ef0feeb4bddc0895 Message-Id: <20211221035002.94BE03858415@sourceware.org> Date: Tue, 21 Dec 2021 03:50:02 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 21 Dec 2021 03:50:02 -0000 https://gcc.gnu.org/g:460d53f816fe30093653cb22ef0feeb4bddc0895 commit r12-6084-g460d53f816fe30093653cb22ef0feeb4bddc0895 Author: Xionghu Luo Date: Mon Dec 20 21:02:50 2021 -0600 rs6000: Replace UNSPECS with ss_plus/us_plus and ss_minus/us_minus These four UNSPECS seems could be replaced with native RTL. For "(set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))": Quoted David's explanation: "The design came from the early implementation of Altivec: https://gcc.gnu.org/pipermail/gcc-patches/2002-May/077409.html If one later checks for saturation (reads VSCR), one needs a corresponding SET of the value. It's set in an architecture-specific manner that isn't described to GCC, but it's set, not just clobbered and in an undefined state. The RTL does not describe that VSCR is set to the value 0. The (const_int 0) is not the value set. You can think of the (const_int 0) as a dummy RTL argument to the VSCR UNSPEC. UNSPEC requires at least one argument and the pattern doesn't try to express the argument, so it uses a dummy RTL constant. It's part of a PARALLEL and the plus or minus already expresses the data dependency of the pattern on the input operands." gcc/ChangeLog: 2021-12-21 Xionghu Luo * config/rs6000/altivec.md (altivec_vaddus): Replace UNSPEC_VADDU with us_plus. (altivec_vaddss): Replace UNSPEC_VADDS with ss_plus. (altivec_vsubus): Replace UNSPEC_VSUBU with us_minus. (altivec_vsubss): Replace UNSPEC_VSUBS with ss_minus. (altivec_abss_): Likewise. Diff: --- gcc/config/rs6000/altivec.md | 29 ++++++++++------------------- 1 file changed, 10 insertions(+), 19 deletions(-) diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index ef432112333..c2312cc1e0f 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -29,8 +29,6 @@ UNSPEC_VMHADDSHS UNSPEC_VMHRADDSHS UNSPEC_VADDCUW - UNSPEC_VADDU - UNSPEC_VADDS UNSPEC_VAVGU UNSPEC_VAVGS UNSPEC_VMULEUB @@ -61,8 +59,6 @@ UNSPEC_VSR UNSPEC_VSRO UNSPEC_VSUBCUW - UNSPEC_VSUBU - UNSPEC_VSUBS UNSPEC_VSUM4UBS UNSPEC_VSUM4S UNSPEC_VSUM2SWS @@ -517,9 +513,8 @@ (define_insn "altivec_vaddus" [(set (match_operand:VI 0 "register_operand" "=v") - (unspec:VI [(match_operand:VI 1 "register_operand" "v") - (match_operand:VI 2 "register_operand" "v")] - UNSPEC_VADDU)) + (us_plus:VI (match_operand:VI 1 "register_operand" "v") + (match_operand:VI 2 "register_operand" "v"))) (set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))] "" "vaddus %0,%1,%2" @@ -527,9 +522,8 @@ (define_insn "altivec_vaddss" [(set (match_operand:VI 0 "register_operand" "=v") - (unspec:VI [(match_operand:VI 1 "register_operand" "v") - (match_operand:VI 2 "register_operand" "v")] - UNSPEC_VADDS)) + (ss_plus:VI (match_operand:VI 1 "register_operand" "v") + (match_operand:VI 2 "register_operand" "v"))) (set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))] "VECTOR_UNIT_ALTIVEC_P (mode)" "vaddss %0,%1,%2" @@ -563,9 +557,8 @@ (define_insn "altivec_vsubus" [(set (match_operand:VI 0 "register_operand" "=v") - (unspec:VI [(match_operand:VI 1 "register_operand" "v") - (match_operand:VI 2 "register_operand" "v")] - UNSPEC_VSUBU)) + (us_minus:VI (match_operand:VI 1 "register_operand" "v") + (match_operand:VI 2 "register_operand" "v"))) (set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))] "VECTOR_UNIT_ALTIVEC_P (mode)" "vsubus %0,%1,%2" @@ -573,9 +566,8 @@ (define_insn "altivec_vsubss" [(set (match_operand:VI 0 "register_operand" "=v") - (unspec:VI [(match_operand:VI 1 "register_operand" "v") - (match_operand:VI 2 "register_operand" "v")] - UNSPEC_VSUBS)) + (ss_minus:VI (match_operand:VI 1 "register_operand" "v") + (match_operand:VI 2 "register_operand" "v"))) (set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))] "VECTOR_UNIT_ALTIVEC_P (mode)" "vsubss %0,%1,%2" @@ -3480,9 +3472,8 @@ (define_expand "altivec_abss_" [(set (match_dup 2) (vec_duplicate:VI (const_int 0))) (parallel [(set (match_dup 3) - (unspec:VI [(match_dup 2) - (match_operand:VI 1 "register_operand" "v")] - UNSPEC_VSUBS)) + (ss_minus:VI (match_dup 2) + (match_operand:VI 1 "register_operand" "v"))) (set (reg:SI VSCR_REGNO) (unspec:SI [(const_int 0)] UNSPEC_SET_VSCR))]) (set (match_operand:VI 0 "register_operand" "=v")