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From: Tom de Vries <vries@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r12-6525] [nvptx] Add gcc.target/nvptx/atomic-exchange-*.c test-cases
Date: Wed, 12 Jan 2022 14:56:40 +0000 (GMT) [thread overview]
Message-ID: <20220112145640.C469F3940039@sourceware.org> (raw)
https://gcc.gnu.org/g:758b3a5f8f4fe3058d30306eb765decc1da8c1e6
commit r12-6525-g758b3a5f8f4fe3058d30306eb765decc1da8c1e6
Author: Tom de Vries <tdevries@suse.de>
Date: Wed Jan 12 08:45:52 2022 +0100
[nvptx] Add gcc.target/nvptx/atomic-exchange-*.c test-cases
Add a few test-cases that test expansion of __atomic_exchange.
Tested on nvptx.
gcc/testsuite/ChangeLog:
2022-01-12 Tom de Vries <tdevries@suse.de>
* gcc.target/nvptx/atomic-exchange-1.c: New test.
* gcc.target/nvptx/atomic-exchange-2.c: New test.
* gcc.target/nvptx/atomic-exchange-3.c: New test.
* gcc.target/nvptx/atomic-exchange-4.c: New test.
Diff:
---
gcc/testsuite/gcc.target/nvptx/atomic-exchange-1.c | 39 ++++++++++++
gcc/testsuite/gcc.target/nvptx/atomic-exchange-2.c | 33 ++++++++++
gcc/testsuite/gcc.target/nvptx/atomic-exchange-3.c | 33 ++++++++++
gcc/testsuite/gcc.target/nvptx/atomic-exchange-4.c | 74 ++++++++++++++++++++++
4 files changed, 179 insertions(+)
diff --git a/gcc/testsuite/gcc.target/nvptx/atomic-exchange-1.c b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-1.c
new file mode 100644
index 00000000000..c63f52b168c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-1.c
@@ -0,0 +1,39 @@
+/* Test the atomic exchange expansion, shared state space. */
+
+/* { dg-do compile } */
+/* { dg-options "-Wno-long-long" } */
+
+enum memmodel
+{
+ MEMMODEL_SEQ_CST = 5
+};
+
+unsigned char u8 __attribute__((shared));
+unsigned short u16 __attribute__((shared));
+unsigned int u32 __attribute__((shared));
+unsigned long long int u64 __attribute__((shared));
+
+int
+main()
+{
+ __atomic_exchange_n (&u8, 0, MEMMODEL_SEQ_CST);
+ __atomic_exchange_n (&u16, 0, MEMMODEL_SEQ_CST);
+ __atomic_exchange_n (&u32, 0, MEMMODEL_SEQ_CST);
+ __atomic_exchange_n (&u64, 0, MEMMODEL_SEQ_CST);
+
+ return 0;
+}
+
+
+/* Not ptx-native, fallback to libatomic.
+ Libatomic uses generic addressing with a global lock and membar.sys barriers.
+ We could implement these more efficiently by cloning libatomic for .shared,
+ using a per-CTA lock and membar.cta barrier. But we'd expect
+ performance-critical code to use the ptx-native atomic sizes 32 and 64 bit,
+ so that doesn't seem to be worth the trouble. */
+/* { dg-final { scan-assembler-times "(?n)call .* __atomic_exchange_1" 1 } } */
+/* { dg-final { scan-assembler-times "(?n)call .* __atomic_exchange_2" 1 } } */
+
+/* { dg-final { scan-assembler-times "atom.shared.exch.b32" 1 } } */
+/* { dg-final { scan-assembler-times "atom.shared.exch.b64" 1 } } */
+/* { dg-final { scan-assembler-times "membar.cta" 4 } } */
diff --git a/gcc/testsuite/gcc.target/nvptx/atomic-exchange-2.c b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-2.c
new file mode 100644
index 00000000000..4301e74e94e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-2.c
@@ -0,0 +1,33 @@
+/* Test the atomic exchange expansion, global state space. */
+
+/* { dg-do compile } */
+/* { dg-options "-Wno-long-long" } */
+
+enum memmodel
+{
+ MEMMODEL_SEQ_CST = 5
+};
+
+unsigned char u8;
+unsigned short u16;
+unsigned int u32;
+unsigned long long int u64;
+
+int
+main()
+{
+ __atomic_exchange_n (&u8, 0, MEMMODEL_SEQ_CST);
+ __atomic_exchange_n (&u16, 0, MEMMODEL_SEQ_CST);
+ __atomic_exchange_n (&u32, 0, MEMMODEL_SEQ_CST);
+ __atomic_exchange_n (&u64, 0, MEMMODEL_SEQ_CST);
+
+ return 0;
+}
+
+/* Not ptx-native, fallback to libatomic. */
+/* { dg-final { scan-assembler-times "(?n)call .* __atomic_exchange_1" 1 } } */
+/* { dg-final { scan-assembler-times "(?n)call .* __atomic_exchange_2" 1 } } */
+
+/* { dg-final { scan-assembler-times "atom.global.exch.b32" 1 } } */
+/* { dg-final { scan-assembler-times "atom.global.exch.b64" 1 } } */
+/* { dg-final { scan-assembler-times "membar.sys" 4 } } */
diff --git a/gcc/testsuite/gcc.target/nvptx/atomic-exchange-3.c b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-3.c
new file mode 100644
index 00000000000..2f8232f25eb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-3.c
@@ -0,0 +1,33 @@
+/* Test the atomic exchange expansion, generic addressing. */
+
+/* { dg-do compile } */
+/* { dg-options "-Wno-long-long" } */
+
+enum memmodel
+{
+ MEMMODEL_SEQ_CST = 5
+};
+
+unsigned char *u8;
+unsigned short *u16;
+unsigned int *u32;
+unsigned long long int *u64;
+
+int
+main()
+{
+ __atomic_exchange_n (u8, 0, MEMMODEL_SEQ_CST);
+ __atomic_exchange_n (u16, 0, MEMMODEL_SEQ_CST);
+ __atomic_exchange_n (u32, 0, MEMMODEL_SEQ_CST);
+ __atomic_exchange_n (u64, 0, MEMMODEL_SEQ_CST);
+
+ return 0;
+}
+
+/* Not ptx-native, fallback to libatomic. */
+/* { dg-final { scan-assembler-times "(?n)call .* __atomic_exchange_1" 1 } } */
+/* { dg-final { scan-assembler-times "(?n)call .* __atomic_exchange_2" 1 } } */
+
+/* { dg-final { scan-assembler-times "atom.exch.b32" 1 } } */
+/* { dg-final { scan-assembler-times "atom.exch.b64" 1 } } */
+/* { dg-final { scan-assembler-times "membar.sys" 4 } } */
diff --git a/gcc/testsuite/gcc.target/nvptx/atomic-exchange-4.c b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-4.c
new file mode 100644
index 00000000000..de1d395cccf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nvptx/atomic-exchange-4.c
@@ -0,0 +1,74 @@
+/* Test the atomic exchange expansion, execution. */
+
+/* { dg-do run } */
+/* { dg-options "-Wno-long-long" } */
+
+/* We're trying to generate this type of store/exchange/load sequence:
+ st.global.u32 [g32], %r60;
+ atom.global.exch.b32 %r22, [g32], 2;
+ ld.global.u32 %r23, [g32];
+ with no insns inbetween.
+
+ We compile this at -O0, to keep the compiler from optimizing out the
+ "p = (P)" assignment. If the assignment is optimized out we don't test
+ the generic case, iow we generate for instance atom.global.exch.b32 instead
+ of atom.exch.b32.
+
+ Compiling at -O0 however does introduce loads and stores in the
+ store/exchange/load sequence, so we fix that by using the register
+ keyword. */
+
+enum memmodel
+{
+ MEMMODEL_RELAXED = 0,
+};
+
+unsigned int g32;
+unsigned long long int g64;
+
+unsigned int s32 __attribute__((shared));
+unsigned long long int s64 __attribute__((shared));
+
+#define TEST(P, V1, V2) \
+ { \
+ register typeof (*(P)) tmp; \
+ register typeof (*(P)) tmp2; \
+ __atomic_store_n ((P), (V1), MEMMODEL_RELAXED); \
+ tmp = __atomic_exchange_n ((P), (V2), MEMMODEL_RELAXED); \
+ tmp2 = __atomic_load_n ((P), MEMMODEL_RELAXED); \
+ if (tmp != (V1) || tmp2 != (V2)) \
+ __builtin_abort (); \
+ }
+
+#define TEST2(P, V1, V2) \
+ { \
+ register typeof (*(P)) tmp; \
+ register typeof (*(P)) tmp2; \
+ *(P) = (V1); \
+ tmp = __atomic_exchange_n ((P), (V2), MEMMODEL_RELAXED); \
+ tmp2 = *(P); \
+ if (tmp != (V1) || tmp2 != (V2)) \
+ __builtin_abort (); \
+ }
+
+#define TESTS(P) \
+ { \
+ TEST ((P), 1, 2); \
+ TEST2 ((P), 3, 4); \
+ { \
+ register typeof (*(P)) * p = (P); \
+ TEST (p, 1, 2); \
+ TEST2 (p, 3, 4); \
+ } \
+ }
+
+int
+main ()
+{
+ TESTS (&g32);
+ TESTS (&g64);
+ TESTS (&s32);
+ TESTS (&s64);
+
+ return 0;
+}
reply other threads:[~2022-01-12 14:56 UTC|newest]
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