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From: Michael Meissner <meissner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/meissner/heads/work076)] Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136
Date: Thu, 20 Jan 2022 17:34:51 +0000 (GMT)	[thread overview]
Message-ID: <20220120173451.A5CAE3857818@sourceware.org> (raw)

https://gcc.gnu.org/g:dbee915ddc37748eb020ca40d70853147b71f861

commit dbee915ddc37748eb020ca40d70853147b71f861
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Jan 20 12:34:26 2022 -0500

    Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136
    
    If you compile module_advect_em.F90 with -Ofast -mcpu=power10, one module
    is large enough that we can't use a single conditional jump to span the
    function.  Instead, we have to reverse the condition, and do a conditional
    jump around an unconditional branch.  It turns out when xxspltiw and
    xxspltdp instructions were generated, they were not marked as being
    prefixed (i.e. length of 12 bytes instead of 4 bytes).  This meant the
    calculations for the branch length were off, which in turn meant the
    assembler raised an error because it couldn't do the conditional jump.
    
    The fix is to set the maybe_prefixed attribute so that insns with the type
    'vecperm' might be prefixed.  Then in the code that optionally puts a 'p'
    in front of the insn skip doing so for the permutes (i.e. load constant
    with splat instruction).
    
    gcc/
    2022-01-20   Michael Meissner  <meissner@linux.ibm.com>
    
            PR target/104136
            * config/rs6000/rs6000.cc (rs6000_final_prescan_insn): Do not
            prepend a 'p' for xxspltiw and xxspltidp.
            * config/rs6000/rs6000.md (maybe_prefixed): Indicate that vector
            permute instructions might be prefixed.

Diff:
---
 gcc/config/rs6000/rs6000.cc | 7 +++++--
 gcc/config/rs6000/rs6000.md | 2 +-
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 0882ecbaebf..81a4ede0e8e 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -26653,7 +26653,9 @@ static bool prepend_p_to_next_insn;
 
 /* Define FINAL_PRESCAN_INSN if some processing needs to be done before
    outputting the assembler code.  On the PowerPC, we remember if the current
-   insn is a prefixed insn where we need to emit a 'p' before the insn.
+   insn is a prefixed insn where we need to emit a 'p' before the insn.  We do
+   not do this for permute type operations (such as XXSPLTIW or XXSPLTIDP),
+   since those operations do not have a non-prefixed format.
 
    In addition, if the insn is part of a PC-relative reference to an external
    label optimization, this is recorded also.  */
@@ -26662,7 +26664,8 @@ rs6000_final_prescan_insn (rtx_insn *insn, rtx [], int)
 {
   prepend_p_to_next_insn = (get_attr_maybe_prefixed (insn)
 			    == MAYBE_PREFIXED_YES
-			    && get_attr_prefixed (insn) == PREFIXED_YES);
+			    && get_attr_prefixed (insn) == PREFIXED_YES
+			    && get_attr_type (insn) != TYPE_VECPERM);
   return;
 }
 
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 59531b6d07e..890edfc5318 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -287,7 +287,7 @@
 ;; Whether this insn has a prefixed form and a non-prefixed form.
 (define_attr "maybe_prefixed" "no,yes"
   (if_then_else (eq_attr "type" "load,fpload,vecload,store,fpstore,vecstore,
-  				 integer,add")
+  				 integer,add,vecperm")
 		(const_string "yes")
 		(const_string "no")))


             reply	other threads:[~2022-01-20 17:34 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-20 17:34 Michael Meissner [this message]
2022-01-20 19:43 Michael Meissner
2022-01-21 15:36 Michael Meissner

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