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From: Michael Meissner <meissner@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work076)] Revert patches. Date: Fri, 21 Jan 2022 15:26:42 +0000 (GMT) [thread overview] Message-ID: <20220121152642.C48573858C60@sourceware.org> (raw) https://gcc.gnu.org/g:718ff44e3adfdfd5ce84f4bac06738bd9d53bd34 commit 718ff44e3adfdfd5ce84f4bac06738bd9d53bd34 Author: Michael Meissner <meissner@linux.ibm.com> Date: Fri Jan 21 10:25:42 2022 -0500 Revert patches. gcc/ 2022-01-20 Michael Meissner <meissner@the-meissners.org> Revert patches. * config/rs6000/rs6000-protos.h (prefixed_xxsplti_p): Delete. * config/rs6000/rs6000.c (prefixed_xxsplti_p): Delete. * config/rs6000/rs6000.md (prefixed attribute): Do not check for xxspltiw or xxspltidp instructions. (mov<mode>_hardfloat32): Explicitly set the prefixed attribute when we will be loading a constant with xxspltiw or xxspltidp. (mov<mode>_hardfloat64): Likewise. gcc/ 2022-01-20 Michael Meissner <meissner@the-meissners.org> Revert patch. PR target/104136 * gcc/config/vsx.md (vsx_mov<mode>_64bit): Explicitly set the prefixed attribute for xxspltiw and xxspltidp instructions. (vsx_mov<mode>_32bit): Likewise. Diff: --- gcc/config/rs6000/rs6000-protos.h | 1 + gcc/config/rs6000/rs6000.cc | 38 ++++++++++++++++++++++++++++++++++++++ gcc/config/rs6000/rs6000.md | 24 ++++++++---------------- gcc/config/rs6000/vsx.md | 12 +----------- 4 files changed, 48 insertions(+), 27 deletions(-) diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index 3ea01023609..e322ac0c199 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -199,6 +199,7 @@ enum non_prefixed_form reg_to_non_prefixed (rtx reg, machine_mode mode); extern bool prefixed_load_p (rtx_insn *); extern bool prefixed_store_p (rtx_insn *); extern bool prefixed_paddi_p (rtx_insn *); +extern bool prefixed_xxsplti_p (rtx_insn *); extern void rs6000_asm_output_opcode (FILE *); extern void output_pcrel_opt_reloc (rtx); extern void rs6000_final_prescan_insn (rtx_insn *, rtx [], int); diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 7b8a3b5299a..b34962da27d 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -26617,6 +26617,44 @@ prefixed_paddi_p (rtx_insn *insn) return (iform == INSN_FORM_PCREL_EXTERNAL || iform == INSN_FORM_PCREL_LOCAL); } +/* Whether an instruction is a prefixed XXSPLTI* instruction. This is called + from the prefixed attribute processing. */ + +bool +prefixed_xxsplti_p (rtx_insn *insn) +{ + rtx set = single_set (insn); + if (!set) + return false; + + rtx dest = SET_DEST (set); + rtx src = SET_SRC (set); + machine_mode mode = GET_MODE (dest); + + if (!REG_P (dest) && !SUBREG_P (dest)) + return false; + + if (GET_CODE (src) == UNSPEC) + { + int unspec = XINT (src, 1); + return (unspec == UNSPEC_XXSPLTIW + || unspec == UNSPEC_XXSPLTIDP + || unspec == UNSPEC_XXSPLTI32DX); + } + + vec_const_128bit_type vsx_const; + if (vec_const_128bit_to_bytes (src, mode, &vsx_const)) + { + if (constant_generates_xxspltiw (&vsx_const)) + return true; + + if (constant_generates_xxspltidp (&vsx_const)) + return true; + } + + return false; +} + /* Whether the next instruction needs a 'p' prefix issued before the instruction is printed out. */ static bool prepend_p_to_next_insn; diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 4e221189028..59531b6d07e 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -314,6 +314,11 @@ (eq_attr "type" "integer,add") (if_then_else (match_test "prefixed_paddi_p (insn)") + (const_string "yes") + (const_string "no")) + + (eq_attr "type" "vecperm") + (if_then_else (match_test "prefixed_xxsplti_p (insn)") (const_string "yes") (const_string "no"))] @@ -7852,11 +7857,7 @@ (set_attr "isa" "*, *, p9v, p8v, *, p9v, p8v, *, *, *, *, *, - *, *, *, *, p10") - (set_attr "prefixed" - "*, *, *, *, *, *, - *, *, *, *, *, *, - *, *, *, *, yes")]) + *, *, *, *, p10")]) ;; LWZ LFIWZX STW STFIWX MTVSRWZ MFVSRWZ ;; FMR MR MT%0 MF%1 NOP @@ -8158,11 +8159,7 @@ (set_attr "isa" "*, *, *, p9v, p9v, p7v, p7v, *, *, *, - *, *, *, p10") - (set_attr "prefixed" - "*, *, *, *, *, - *, *, *, *, *, - *, *, *, yes")]) + *, *, *, p10")]) ;; STW LWZ MR G-const H-const F-const @@ -8235,12 +8232,7 @@ "*, *, *, p9v, p9v, p7v, p7v, *, *, *, *, *, *, *, *, - *, p8v, p8v, p10") - (set_attr "prefixed" - "*, *, *, *, *, - *, *, *, *, *, - *, *, *, *, *, - *, *, *, *")]) + *, p8v, p8v, p10")]) ;; STD LD MR MT<SPR> MF<SPR> G-const ;; H-const F-const Special diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index c8c891e13f4..e84ffb6a6db 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -1237,12 +1237,7 @@ "<VSisa>, <VSisa>, <VSisa>, *, *, *, *, *, *, *, p9v, *, p10, p10, - <VSisa>, *, *, *, *") - (set_attr "prefixed" - "*, *, *, *, *, *, - *, *, *, *, *, *, - *, yes, - *, *, *, *, *")]) + <VSisa>, *, *, *, *")]) ;; VSX store VSX load VSX move GPR load GPR store GPR move ;; LXVKQ XXSPLTI* @@ -1281,11 +1276,6 @@ "<VSisa>, <VSisa>, <VSisa>, *, *, *, p10, p10, p9v, *, <VSisa>, *, *, - *, *") - (set_attr "prefixed" - "*, *, *, *, *, *, - *, yes, - *, *, *, *, *, *, *")]) ;; Explicit load/store expanders for the builtin functions
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