From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1984) id 98333385C413; Wed, 2 Feb 2022 10:54:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 98333385C413 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Tamar Christina To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-6994] AArch64: use canonical ordering for complex mul, fma and fms X-Act-Checkin: gcc X-Git-Author: Tamar Christina X-Git-Refname: refs/heads/master X-Git-Oldrev: 55d83cdf23b5f284b4e0bd0a6d1af3d947b2e7c3 X-Git-Newrev: ab95fe61fea38fbac7f4e00abd32c2530532351a Message-Id: <20220202105448.98333385C413@sourceware.org> Date: Wed, 2 Feb 2022 10:54:48 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 02 Feb 2022 10:54:48 -0000 https://gcc.gnu.org/g:ab95fe61fea38fbac7f4e00abd32c2530532351a commit r12-6994-gab95fe61fea38fbac7f4e00abd32c2530532351a Author: Tamar Christina Date: Wed Feb 2 10:51:38 2022 +0000 AArch64: use canonical ordering for complex mul, fma and fms After the first patch in the series this updates the optabs to expect the canonical sequence. gcc/ChangeLog: PR tree-optimization/102819 PR tree-optimization/103169 * config/aarch64/aarch64-simd.md (cml4): Use canonical order. * config/aarch64/aarch64-sve.md (cml4): Likewise. Diff: --- gcc/config/aarch64/aarch64-simd.md | 14 +++++++------- gcc/config/aarch64/aarch64-sve.md | 6 +++--- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 71c429fe75a..13255be84fd 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -556,17 +556,17 @@ ;; remainder. Because of this, expand early. (define_expand "cml4" [(set (match_operand:VHSDF 0 "register_operand") - (plus:VHSDF (match_operand:VHSDF 1 "register_operand") - (unspec:VHSDF [(match_operand:VHSDF 2 "register_operand") - (match_operand:VHSDF 3 "register_operand")] - FCMLA_OP)))] + (plus:VHSDF (unspec:VHSDF [(match_operand:VHSDF 1 "register_operand") + (match_operand:VHSDF 2 "register_operand")] + FCMLA_OP) + (match_operand:VHSDF 3 "register_operand")))] "TARGET_COMPLEX && !BYTES_BIG_ENDIAN" { rtx tmp = gen_reg_rtx (mode); - emit_insn (gen_aarch64_fcmla (tmp, operands[1], - operands[3], operands[2])); + emit_insn (gen_aarch64_fcmla (tmp, operands[3], + operands[2], operands[1])); emit_insn (gen_aarch64_fcmla (operands[0], tmp, - operands[3], operands[2])); + operands[2], operands[1])); DONE; }) diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index bd22fe52a31..bd60e65b0c3 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -7278,11 +7278,11 @@ rtx tmp = gen_reg_rtx (mode); emit_insn (gen_aarch64_pred_fcmla (tmp, operands[4], - operands[3], operands[2], - operands[1], operands[5])); + operands[2], operands[1], + operands[3], operands[5])); emit_insn (gen_aarch64_pred_fcmla (operands[0], operands[4], - operands[3], operands[2], + operands[2], operands[1], tmp, operands[5])); DONE; })