From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1363) id 26CA63858D1E; Wed, 9 Feb 2022 22:43:03 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 26CA63858D1E MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="utf-8" From: Uros Bizjak To: gcc-cvs@gcc.gnu.org Subject: [gcc r10-10444] i386: Force inputs to a register to avoid lowpart_subreg failure [PR104458] X-Act-Checkin: gcc X-Git-Author: Uros Bizjak X-Git-Refname: refs/heads/releases/gcc-10 X-Git-Oldrev: 0ceeec139d2e181bbeab389deaf53c118a507e68 X-Git-Newrev: 983b7bcdd048650b193aad6018042b21626b89eb Message-Id: <20220209224303.26CA63858D1E@sourceware.org> Date: Wed, 9 Feb 2022 22:43:03 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 09 Feb 2022 22:43:03 -0000 https://gcc.gnu.org/g:983b7bcdd048650b193aad6018042b21626b89eb commit r10-10444-g983b7bcdd048650b193aad6018042b21626b89eb Author: Uros Bizjak Date: Wed Feb 9 23:40:55 2022 +0100 i386: Force inputs to a register to avoid lowpart_subreg failure [PR104458] Input operands can be in the form of: (subreg:DI (reg:V2SF 96) 0) which chokes lowpart_subreg. Force inputs to a register, which is preferable even when the input operand is from memory. 2022-02-09 Uroš Bizjak gcc/ChangeLog: PR target/104458 * config/i386/i386-expand.c (ix86_split_idivmod): Force operands[2] and operands[3] into a register.. gcc/testsuite/ChangeLog: PR target/104458 * gcc.target/i386/pr104458.c: New test. Diff: --- gcc/config/i386/i386-expand.c | 3 +++ gcc/testsuite/gcc.target/i386/pr104458.c | 13 +++++++++++++ 2 files changed, 16 insertions(+) diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c index 47d52550e5e..d690d5b9bc1 100644 --- a/gcc/config/i386/i386-expand.c +++ b/gcc/config/i386/i386-expand.c @@ -1140,6 +1140,9 @@ ix86_split_idivmod (machine_mode mode, rtx operands[], rtx scratch, tmp0, tmp1, tmp2; rtx (*gen_divmod4_1) (rtx, rtx, rtx, rtx); + operands[2] = force_reg (mode, operands[2]); + operands[3] = force_reg (mode, operands[3]); + switch (mode) { case E_SImode: diff --git a/gcc/testsuite/gcc.target/i386/pr104458.c b/gcc/testsuite/gcc.target/i386/pr104458.c new file mode 100644 index 00000000000..d1d28c13118 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr104458.c @@ -0,0 +1,13 @@ +/* PR target/104458 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O1 -m8bit-idiv" } */ + +typedef float __attribute__((__vector_size__ (8))) F; + +int i; + +void +foo (F f) +{ + i += i % (long) f; +}