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* [gcc r12-7247] aarch64: Add +nosve to tests
@ 2022-02-15 18:10 Richard Sandiford
0 siblings, 0 replies; only message in thread
From: Richard Sandiford @ 2022-02-15 18:10 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:fd77b1208ddd5605b32bd836e6b8ce986fb94c8c
commit r12-7247-gfd77b1208ddd5605b32bd836e6b8ce986fb94c8c
Author: Richard Sandiford <richard.sandiford@arm.com>
Date: Tue Feb 15 18:09:34 2022 +0000
aarch64: Add +nosve to tests
This patch adds +nosve to various Advanced SIMD-only tests.
gcc/testsuite/
* gcc.target/aarch64/shl-combine-2.c: New test.
* gcc.target/aarch64/shl-combine-3.c: Likewise.
* gcc.target/aarch64/shl-combine-4.c: Likewise.
* gcc.target/aarch64/shl-combine-5.c: Likewise.
* gcc.target/aarch64/xtn-combine-1.c: Likewise.
* gcc.target/aarch64/xtn-combine-2.c: Likewise.
* gcc.target/aarch64/xtn-combine-3.c: Likewise.
* gcc.target/aarch64/xtn-combine-4.c: Likewise.
* gcc.target/aarch64/xtn-combine-5.c: Likewise.
* gcc.target/aarch64/xtn-combine-6.c: Likewise.
Diff:
---
gcc/testsuite/gcc.target/aarch64/shl-combine-2.c | 2 ++
gcc/testsuite/gcc.target/aarch64/shl-combine-3.c | 2 ++
gcc/testsuite/gcc.target/aarch64/shl-combine-4.c | 2 ++
gcc/testsuite/gcc.target/aarch64/shl-combine-5.c | 2 ++
gcc/testsuite/gcc.target/aarch64/xtn-combine-1.c | 2 ++
gcc/testsuite/gcc.target/aarch64/xtn-combine-2.c | 2 ++
gcc/testsuite/gcc.target/aarch64/xtn-combine-3.c | 2 ++
gcc/testsuite/gcc.target/aarch64/xtn-combine-4.c | 2 ++
gcc/testsuite/gcc.target/aarch64/xtn-combine-5.c | 2 ++
gcc/testsuite/gcc.target/aarch64/xtn-combine-6.c | 2 ++
10 files changed, 20 insertions(+)
diff --git a/gcc/testsuite/gcc.target/aarch64/shl-combine-2.c b/gcc/testsuite/gcc.target/aarch64/shl-combine-2.c
index 6a0331fbe60..491fd44e637 100644
--- a/gcc/testsuite/gcc.target/aarch64/shl-combine-2.c
+++ b/gcc/testsuite/gcc.target/aarch64/shl-combine-2.c
@@ -1,6 +1,8 @@
/* { dg-do assemble } */
/* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */
+#pragma GCC target "+nosve"
+
#define TYPE char
void e (signed TYPE * restrict a, signed TYPE *b, int n)
diff --git a/gcc/testsuite/gcc.target/aarch64/shl-combine-3.c b/gcc/testsuite/gcc.target/aarch64/shl-combine-3.c
index 2086b24a3cb..39bef21f39c 100644
--- a/gcc/testsuite/gcc.target/aarch64/shl-combine-3.c
+++ b/gcc/testsuite/gcc.target/aarch64/shl-combine-3.c
@@ -1,6 +1,8 @@
/* { dg-do assemble } */
/* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */
+#pragma GCC target "+nosve"
+
#define TYPE short
void e (signed TYPE * restrict a, signed TYPE *b, int n)
diff --git a/gcc/testsuite/gcc.target/aarch64/shl-combine-4.c b/gcc/testsuite/gcc.target/aarch64/shl-combine-4.c
index 083181071f4..15dcbff8e8c 100644
--- a/gcc/testsuite/gcc.target/aarch64/shl-combine-4.c
+++ b/gcc/testsuite/gcc.target/aarch64/shl-combine-4.c
@@ -1,6 +1,8 @@
/* { dg-do assemble } */
/* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */
+#pragma GCC target "+nosve"
+
#define TYPE int
void e (signed TYPE * restrict a, signed TYPE *b, int n)
diff --git a/gcc/testsuite/gcc.target/aarch64/shl-combine-5.c b/gcc/testsuite/gcc.target/aarch64/shl-combine-5.c
index 6b2a6bd86b3..703f6302382 100644
--- a/gcc/testsuite/gcc.target/aarch64/shl-combine-5.c
+++ b/gcc/testsuite/gcc.target/aarch64/shl-combine-5.c
@@ -1,6 +1,8 @@
/* { dg-do assemble } */
/* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */
+#pragma GCC target "+nosve"
+
#define TYPE long
void e (signed TYPE * restrict a, signed TYPE *b, int n)
diff --git a/gcc/testsuite/gcc.target/aarch64/xtn-combine-1.c b/gcc/testsuite/gcc.target/aarch64/xtn-combine-1.c
index 14e0414cd14..27b785832f0 100644
--- a/gcc/testsuite/gcc.target/aarch64/xtn-combine-1.c
+++ b/gcc/testsuite/gcc.target/aarch64/xtn-combine-1.c
@@ -1,6 +1,8 @@
/* { dg-do assemble } */
/* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */
+#pragma GCC target "+nosve"
+
#define SIGN signed
#define TYPE1 char
#define TYPE2 short
diff --git a/gcc/testsuite/gcc.target/aarch64/xtn-combine-2.c b/gcc/testsuite/gcc.target/aarch64/xtn-combine-2.c
index c259010442b..02f03fa7efe 100644
--- a/gcc/testsuite/gcc.target/aarch64/xtn-combine-2.c
+++ b/gcc/testsuite/gcc.target/aarch64/xtn-combine-2.c
@@ -1,6 +1,8 @@
/* { dg-do assemble } */
/* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */
+#pragma GCC target "+nosve"
+
#define SIGN signed
#define TYPE1 short
#define TYPE2 int
diff --git a/gcc/testsuite/gcc.target/aarch64/xtn-combine-3.c b/gcc/testsuite/gcc.target/aarch64/xtn-combine-3.c
index 9a2065f6510..4bcbd8519c2 100644
--- a/gcc/testsuite/gcc.target/aarch64/xtn-combine-3.c
+++ b/gcc/testsuite/gcc.target/aarch64/xtn-combine-3.c
@@ -1,6 +1,8 @@
/* { dg-do assemble } */
/* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */
+#pragma GCC target "+nosve"
+
#define SIGN signed
#define TYPE1 int
#define TYPE2 long long
diff --git a/gcc/testsuite/gcc.target/aarch64/xtn-combine-4.c b/gcc/testsuite/gcc.target/aarch64/xtn-combine-4.c
index 77c3dce1204..29703d1d042 100644
--- a/gcc/testsuite/gcc.target/aarch64/xtn-combine-4.c
+++ b/gcc/testsuite/gcc.target/aarch64/xtn-combine-4.c
@@ -1,6 +1,8 @@
/* { dg-do assemble } */
/* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */
+#pragma GCC target "+nosve"
+
#define SIGN unsigned
#define TYPE1 char
#define TYPE2 short
diff --git a/gcc/testsuite/gcc.target/aarch64/xtn-combine-5.c b/gcc/testsuite/gcc.target/aarch64/xtn-combine-5.c
index ae30e864ed7..f5ee30dbae7 100644
--- a/gcc/testsuite/gcc.target/aarch64/xtn-combine-5.c
+++ b/gcc/testsuite/gcc.target/aarch64/xtn-combine-5.c
@@ -1,6 +1,8 @@
/* { dg-do assemble } */
/* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */
+#pragma GCC target "+nosve"
+
#define SIGN unsigned
#define TYPE1 short
#define TYPE2 int
diff --git a/gcc/testsuite/gcc.target/aarch64/xtn-combine-6.c b/gcc/testsuite/gcc.target/aarch64/xtn-combine-6.c
index 882f3d333e2..3ddb87eb687 100644
--- a/gcc/testsuite/gcc.target/aarch64/xtn-combine-6.c
+++ b/gcc/testsuite/gcc.target/aarch64/xtn-combine-6.c
@@ -1,6 +1,8 @@
/* { dg-do assemble } */
/* { dg-options "-O3 --save-temps --param=vect-epilogues-nomask=0" } */
+#pragma GCC target "+nosve"
+
#define SIGN unsigned
#define TYPE1 int
#define TYPE2 long long
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