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From: Michael Meissner <meissner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/meissner/heads/work079)] Update ChangeLog.meissner.
Date: Thu,  3 Mar 2022 02:06:53 +0000 (GMT)	[thread overview]
Message-ID: <20220303020653.0C8623858D39@sourceware.org> (raw)

https://gcc.gnu.org/g:3a2f0251a12712537e36c5e9f93e74b3916739f5

commit 3a2f0251a12712537e36c5e9f93e74b3916739f5
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Mar 2 21:06:34 2022 -0500

    Update ChangeLog.meissner.
    
    2022-03-02   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 36 +++++++++++++++++++++++++++---------
 gcc/testsuite/ChangeLog.meissner | 18 ++++++++++++++++++
 2 files changed, 45 insertions(+), 9 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index de81aebfaeb..9e3ba884853 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,14 +1,32 @@
-work079, patch #2:
-2022-03-01   Michael Meissner  <meissner@linux.ibm.com>
+work079, patch #4:
+2022-03-02   Michael Meissner  <meissner@linux.ibm.com>
 
 	PR target/103109
 	* config/rs6000/rs6000.md (su_int32): New code attribute.
-	(<u>mul<mode><dmode>3): Convert into define_insn_and_split.
+	(<u>mul<mode><dmode>3): Convert from define_expand to
+	define_insn_and_split.
 	(maddld<mode>4): Add generator function.
 	(<u>mulditi3_<u>adddi3): New insn.
 	(<u>mulditi3_add_const): New insn.
-	(addti3): Convert into define_insn_and_split.
+	(<u>mulditi3_<u>adddi3_upper): New insn.
+	(addti3): Convert from define_expand to define_insn_and_split.
 	(subti3): Likewise.
+	* config/rs6000/vsx.md (extendditi2): Allow on power9 systems.
+	Add isa attribute for the stuff that needs power10 support.
+	(zero_extendditi2): New insn.
+
+work079, patch #3
+2022-03-02   Michael Meissner  <meissner@linux.ibm.com>
+
+	PR target/104698
+	* config/rs6000/vsx.md (mtvsrdd_diti_w1): Delete.
+	(extendditi2): Convert from define_expand to
+	define_insn_and_split.  Replace with code to deal with both GPR
+	registers and with altivec registers.
+
+2022-03-02   Michael Meissner  <meissner@linux.ibm.com>
+
+	Rebase to 8f1243ed62a 042fc77d5dc
 
 2022-02-28   Michael Meissner  <meissner@linux.ibm.com>
 
@@ -18,13 +36,13 @@ work079, patch #2:
 
 	Rebase to b6298e5b75a 03418e431cc
 
+work079, patch #2:
+
+	Patch reverted.
+
 work079, patch #1:
-2022-02-25   Michael Meissner  <meissner@linux.ibm.com>
 
-	PR target/104698
-	* config/rs6000/vsx.md (mtvsrdd_diti_w1): Delete.
-	(extendditi2): Replace with code to deal with both GPR registers
-	and with altivec registers.
+	Patch reverted.
 
 2022-02-25   Michael Meissner  <meissner@linux.ibm.com>
 
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index a7b794405a2..eab3cd7f44a 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,21 @@
+work079, patch #4:
+2022-03-02   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/testsuite/
+	PR target/103109
+	* gcc.target/powerpc/pr103109.c: New test.
+
+work079, patch #3:
+2022-03-02   Michael Meissner  <meissner@linux.ibm.com>
+
+	PR target/104698
+	* gcc.target/powerpc/pr104698-1.c: New test.
+	* gcc.target/powerpc/pr104698-2.c: New test.
+
+2022-03-02   Michael Meissner  <meissner@linux.ibm.com>
+
+	Rebase to 8f1243ed62a 042fc77d5dc
+
 2022-02-28   Michael Meissner  <meissner@linux.ibm.com>
 
 	Rebase to b6298e5b75a 03418e431cc


             reply	other threads:[~2022-03-03  2:06 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-03  2:06 Michael Meissner [this message]
  -- strict thread matches above, loose matches on Subject: below --
2022-03-02 18:13 Michael Meissner
2022-03-02 18:12 Michael Meissner
2022-03-02 18:12 Michael Meissner
2022-03-02 18:12 Michael Meissner
2022-03-01  6:39 Michael Meissner
2022-03-01  6:37 Michael Meissner
2022-03-01  0:41 Michael Meissner
2022-02-26  4:48 Michael Meissner

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