From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1851) id ACC373858410; Mon, 7 Mar 2022 10:38:09 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org ACC373858410 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Martin Liska To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-7514] translation: reuse string and use switch for codes X-Act-Checkin: gcc X-Git-Author: Martin Liska X-Git-Refname: refs/heads/master X-Git-Oldrev: 2472dcaa8cb9e02e902f83d419c3ee7e0f3d9041 X-Git-Newrev: cfb46c944e8a05653c7eedd79116dae9ce7ad91c Message-Id: <20220307103809.ACC373858410@sourceware.org> Date: Mon, 7 Mar 2022 10:38:09 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 07 Mar 2022 10:38:09 -0000 https://gcc.gnu.org/g:cfb46c944e8a05653c7eedd79116dae9ce7ad91c commit r12-7514-gcfb46c944e8a05653c7eedd79116dae9ce7ad91c Author: Martin Liska Date: Mon Mar 7 10:56:43 2022 +0100 translation: reuse string and use switch for codes PR target/104794 gcc/ChangeLog: * config/arm/arm-builtins.cc (arm_expand_builtin): Reuse error message. Fix ARM_BUILTIN_WRORHI and ARM_BUILTIN_WRORH that can have only range [0,32]. Diff: --- gcc/config/arm/arm-builtins.cc | 127 +++++++++++++++++++++++++---------------- 1 file changed, 77 insertions(+), 50 deletions(-) diff --git a/gcc/config/arm/arm-builtins.cc b/gcc/config/arm/arm-builtins.cc index a7acc1d71e7..6c0b1bda66a 100644 --- a/gcc/config/arm/arm-builtins.cc +++ b/gcc/config/arm/arm-builtins.cc @@ -3922,65 +3922,92 @@ arm_expand_builtin (tree exp, if (GET_MODE (op1) == VOIDmode) { imm = INTVAL (op1); - if ((fcode == ARM_BUILTIN_WRORHI || fcode == ARM_BUILTIN_WRORWI - || fcode == ARM_BUILTIN_WRORH || fcode == ARM_BUILTIN_WRORW) + if ((fcode == ARM_BUILTIN_WRORWI || fcode == ARM_BUILTIN_WRORW) && (imm < 0 || imm > 32)) { - if (fcode == ARM_BUILTIN_WRORHI) - error ("the range of count should be in 0 to 32; please check the intrinsic %<_mm_rori_pi16%> in code"); - else if (fcode == ARM_BUILTIN_WRORWI) - error ("the range of count should be in 0 to 32; please check the intrinsic %<_mm_rori_pi32%> in code"); - else if (fcode == ARM_BUILTIN_WRORH) - error ("the range of count should be in 0 to 32; please check the intrinsic %<_mm_ror_pi16%> in code"); - else - error ("the range of count should be in 0 to 32; please check the intrinsic %<_mm_ror_pi32%> in code"); + const char *builtin = (fcode == ARM_BUILTIN_WRORWI + ? "_mm_rori_pi32" : "_mm_ror_pi32"); + error ("the range of count should be in 0 to 32; " + "please check the intrinsic %qs in code", builtin); + } + else if ((fcode == ARM_BUILTIN_WRORHI || fcode == ARM_BUILTIN_WRORH) + && (imm < 0 || imm > 16)) + { + const char *builtin = (fcode == ARM_BUILTIN_WRORHI + ? "_mm_rori_pi16" : "_mm_ror_pi16"); + error ("the range of count should be in 0 to 16; " + "please check the intrinsic %qs in code", builtin); } else if ((fcode == ARM_BUILTIN_WRORDI || fcode == ARM_BUILTIN_WRORD) && (imm < 0 || imm > 64)) { - if (fcode == ARM_BUILTIN_WRORDI) - error ("the range of count should be in 0 to 64; please check the intrinsic %<_mm_rori_si64%> in code"); - else - error ("the range of count should be in 0 to 64; please check the intrinsic %<_mm_ror_si64%> in code"); + const char *builtin = (fcode == ARM_BUILTIN_WRORDI + ? "_mm_rori_si64" : "_mm_ror_si64"); + error ("the range of count should be in 0 to 64; " + "please check the intrinsic %qs in code", builtin); } else if (imm < 0) { - if (fcode == ARM_BUILTIN_WSRLHI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srli_pi16%> in code"); - else if (fcode == ARM_BUILTIN_WSRLWI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srli_pi32%> in code"); - else if (fcode == ARM_BUILTIN_WSRLDI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srli_si64%> in code"); - else if (fcode == ARM_BUILTIN_WSLLHI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_slli_pi16%> in code"); - else if (fcode == ARM_BUILTIN_WSLLWI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_slli_pi32%> in code"); - else if (fcode == ARM_BUILTIN_WSLLDI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_slli_si64%> in code"); - else if (fcode == ARM_BUILTIN_WSRAHI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srai_pi16%> in code"); - else if (fcode == ARM_BUILTIN_WSRAWI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srai_pi32%> in code"); - else if (fcode == ARM_BUILTIN_WSRADI) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srai_si64%> in code"); - else if (fcode == ARM_BUILTIN_WSRLH) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srl_pi16%> in code"); - else if (fcode == ARM_BUILTIN_WSRLW) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srl_pi32%> in code"); - else if (fcode == ARM_BUILTIN_WSRLD) - error ("the count should be no less than 0; please check the intrinsic %<_mm_srl_si64%> in code"); - else if (fcode == ARM_BUILTIN_WSLLH) - error ("the count should be no less than 0; please check the intrinsic %<_mm_sll_pi16%> in code"); - else if (fcode == ARM_BUILTIN_WSLLW) - error ("the count should be no less than 0; please check the intrinsic %<_mm_sll_pi32%> in code"); - else if (fcode == ARM_BUILTIN_WSLLD) - error ("the count should be no less than 0; please check the intrinsic %<_mm_sll_si64%> in code"); - else if (fcode == ARM_BUILTIN_WSRAH) - error ("the count should be no less than 0; please check the intrinsic %<_mm_sra_pi16%> in code"); - else if (fcode == ARM_BUILTIN_WSRAW) - error ("the count should be no less than 0; please check the intrinsic %<_mm_sra_pi32%> in code"); - else - error ("the count should be no less than 0; please check the intrinsic %<_mm_sra_si64%> in code"); + const char *builtin; + switch (fcode) + { + case ARM_BUILTIN_WSRLHI: + builtin = "_mm_srli_pi16"; + break; + case ARM_BUILTIN_WSRLWI: + builtin = "_mm_srli_pi32"; + break; + case ARM_BUILTIN_WSRLDI: + builtin = "_mm_srli_si64"; + break; + case ARM_BUILTIN_WSLLHI: + builtin = "_mm_slli_pi16"; + break; + case ARM_BUILTIN_WSLLWI: + builtin = "_mm_slli_pi32"; + break; + case ARM_BUILTIN_WSLLDI: + builtin = "_mm_slli_si64"; + break; + case ARM_BUILTIN_WSRAHI: + builtin = "_mm_srai_pi16"; + break; + case ARM_BUILTIN_WSRAWI: + builtin = "_mm_srai_pi32"; + break; + case ARM_BUILTIN_WSRADI: + builtin = "_mm_srai_si64"; + break; + case ARM_BUILTIN_WSRLH: + builtin = "_mm_srl_pi16"; + break; + case ARM_BUILTIN_WSRLW: + builtin = "_mm_srl_pi32"; + break; + case ARM_BUILTIN_WSRLD: + builtin = "_mm_srl_si64"; + break; + case ARM_BUILTIN_WSLLH: + builtin = "_mm_sll_pi16"; + break; + case ARM_BUILTIN_WSLLW: + builtin = "_mm_sll_pi32"; + break; + case ARM_BUILTIN_WSLLD: + builtin = "_mm_sll_si64"; + break; + case ARM_BUILTIN_WSRAH: + builtin = "_mm_sra_pi16"; + break; + case ARM_BUILTIN_WSRAW: + builtin = "_mm_sra_si64"; + break; + default: + builtin = "_mm_sra_si64"; + break; + } + error ("the count should be no less than 0; " + "please check the intrinsic %qs in code", builtin); } } return arm_expand_binop_builtin (icode, exp, target);