From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 38FBD385840C; Sat, 19 Mar 2022 01:24:34 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 38FBD385840C Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work082)] Make addti3/subti3 be define_insn_and_split, instead of define_expand X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work082 X-Git-Oldrev: cfa0de2afeae2779fde477b6a6bf6fd6f171a307 X-Git-Newrev: 423e0c2dfb052c9e1c9bfc9c14ac543da29248b3 Message-Id: <20220319012434.38FBD385840C@sourceware.org> Date: Sat, 19 Mar 2022 01:24:34 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Mar 2022 01:24:34 -0000 https://gcc.gnu.org/g:423e0c2dfb052c9e1c9bfc9c14ac543da29248b3 commit 423e0c2dfb052c9e1c9bfc9c14ac543da29248b3 Author: Michael Meissner Date: Fri Mar 18 21:24:14 2022 -0400 Make addti3/subti3 be define_insn_and_split, instead of define_expand This patch makes addti3 and subti3 be define_insn_and_split instead of define_expand. This patch will be a building block to support in a future patch PR target/103109 which wants to optimize 128-bit some integer multiply-add combinations to use the power9 maddld, maddhd, maddhdu instructions. In order to support recognizing the multiply and add combination, we need to keep the addti3 and subti3 as complete insns through the combiner phase. 2022-03-18 Michael Meissner gcc/ * config/rs6000/rs6000.md (addti3): Don't immediate expand the insn, delay expansion until the split passes. (subti3): Likewise. Diff: --- gcc/config/rs6000/rs6000.md | 38 +++++++++++++++++++++++++++----------- 1 file changed, 27 insertions(+), 11 deletions(-) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index fdfbc6566a5..a74c48efae7 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -7029,12 +7029,19 @@ ;; allocator from allocating registers that overlap with the inputs ;; (for example, having an input in 7,8 and an output in 6,7). We ;; also allow for the output being the same as one of the inputs. - -(define_expand "addti3" - [(set (match_operand:TI 0 "gpc_reg_operand") - (plus:TI (match_operand:TI 1 "gpc_reg_operand") - (match_operand:TI 2 "reg_or_short_operand")))] +;; +;; Addti3/subti3 are define_insn_and_splits instead of define_expand, to allow +;; for combine to make things like multiply and add with extend operations. + +(define_insn_and_split "addti3" + [(set (match_operand:TI 0 "gpc_reg_operand" "=&r,r,r") + (plus:TI (match_operand:TI 1 "gpc_reg_operand" "r,0,r") + (match_operand:TI 2 "reg_or_short_operand" "rn,r,0"))) + (clobber (reg:DI CA_REGNO))] "TARGET_64BIT" + "#" + "&& 1" + [(pc)] { rtx lo0 = gen_lowpart (DImode, operands[0]); rtx lo1 = gen_lowpart (DImode, operands[1]); @@ -7051,13 +7058,19 @@ emit_insn (gen_adddi3_carry (lo0, lo1, lo2)); emit_insn (gen_adddi3_carry_in (hi0, hi1, hi2)); DONE; -}) +} + [(set_attr "length" "8") + (set_attr "type" "add") + (set_attr "size" "128")]) -(define_expand "subti3" - [(set (match_operand:TI 0 "gpc_reg_operand") - (minus:TI (match_operand:TI 1 "reg_or_short_operand") - (match_operand:TI 2 "gpc_reg_operand")))] +(define_insn_and_split "subti3" + [(set (match_operand:TI 0 "gpc_reg_operand" "=&r,r,r") + (minus:TI (match_operand:TI 1 "reg_or_short_operand" "rn,0,r") + (match_operand:TI 2 "gpc_reg_operand" "r,r,0")))] "TARGET_64BIT" + "#" + "&& 1" + [(pc)] { rtx lo0 = gen_lowpart (DImode, operands[0]); rtx lo1 = gen_lowpart (DImode, operands[1]); @@ -7074,7 +7087,10 @@ emit_insn (gen_subfdi3_carry (lo0, lo2, lo1)); emit_insn (gen_subfdi3_carry_in (hi0, hi2, hi1)); DONE; -}) +} + [(set_attr "length" "8") + (set_attr "type" "add") + (set_attr "size" "128")]) ;; 128-bit logical operations expanders