[gcc(refs/users/meissner/heads/work082)] Update ChangeLog.meissner.

[Michael Meissner <meissner@gcc.gnu.org>]

https://gcc.gnu.org/g:4fe51e53ebdcddd624ca3f26dad7550d46730b83

commit 4fe51e53ebdcddd624ca3f26dad7550d46730b83
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Mar 23 12:56:13 2022 -0400

    Update ChangeLog.meissner.
    
    2022-03-23   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
            * ChangeLog.meissner: Update.

Diff:
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 gcc/ChangeLog.meissner | 43 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 37ced301982..b28bab31f0a 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,46 @@
+==================== Work082, patch #8:
+Improve vsx_splat_<mode>_reg
+
+In looking at PR target/99293, I noticed that the code in
+vsx_splat_<mode>_reg used "vecmove" as the "type" insn attribute when the
+"mtvsrdd" is generated.  It should use "mfvsr".  I also added a "p9v" isa
+attribute for that alternative.
+
+2022-03-23   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+	PR target/99392
+	* config/rs6000/rs6000.md (vsx_splat_<mode>_reg): Use the correct
+	insn type attribute.  Add "p9v" isa attribute as needed.
+
+
+==================== Work082, patch #7:
+Improve vsx_extract_<mode>
+
+In looking at PR target/99293, I noticed that the code in
+vsx_extract_<mode> could be improved.
+
+When the element being extracted is the element in the upper 64-bits, we
+should do an insn_split to convert this to a simple move.  This would
+allow the post reload passes to eliminate the move completely.
+
+The code was written before we moved to LRA for register allocation and it
+restricted the target register to just traditional floating point
+registers.  I have changed this to target any VSX register.
+
+The insn type attribute was incorrect in that it used "mfvsr" instead of
+"vecperm" when a xxpermdi would be generated.  Also, when a "mvfsrld"
+would be generated, the type should be "mfvsr".
+
+2022-03-23   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+	PR target/99392
+	* config/rs6000/rs6000.md (vsx_extract_<mode>): Split extracts
+	that are just a move to being a move insn.  Use the correct insn
+	type for the alternatives.
+	(insn splitter for vsx_extract_<mode>): Add new splitter.
+
 ==================== Work082, patch #6:
 Optimize vec_splats of constant vec_extract for V2DI/V2DF.