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From: Michael Meissner <meissner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/meissner/heads/work083)] Make vsx_extract_<mode> use correct insn attributes.
Date: Thu, 24 Mar 2022 19:40:09 +0000 (GMT)	[thread overview]
Message-ID: <20220324194009.4ED163858C54@sourceware.org> (raw)

https://gcc.gnu.org/g:cba5bcdfb9016c02f3d9f516329339e9398405b2

commit cba5bcdfb9016c02f3d9f516329339e9398405b2
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Mar 24 15:39:50 2022 -0400

    Make vsx_extract_<mode> use correct insn attributes.
    
    In looking at PR target/99293, I noticed that the insn "type" attribute is
    incorrect for the vsx_extract_<mode> insns.  In particular:
    
        1)  Simple vector register move should be vecsimple (alternative 1);
        2)  Xxpermdi should be vecperm (alternative 2); (and)
        3)  Mfvsrld should be mfvsr (alternative 4).
    
    This patch fixes those attributes.
    
    2022-03-24   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
            PR target/99392
            * config/rs6000/rs6000.md (vsx_extract_<mode>): Use the correct
            insn type for the alternatives.

Diff:
---
 gcc/config/rs6000/vsx.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index ad722cff70f..c79d796a513 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3451,7 +3451,7 @@
   else
     gcc_unreachable ();
 }
-  [(set_attr "type" "veclogical,mfvsr,mfvsr,vecperm")
+  [(set_attr "type" "vecsimple,vecperm,mfvsr,mfvsr")
    (set_attr "isa" "*,*,p8v,p9v")])
 
 ;; Optimize extracting a single scalar element from memory.


             reply	other threads:[~2022-03-24 19:40 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-24 19:40 Michael Meissner [this message]
2022-03-24 21:31 Michael Meissner

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