From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 46B6A3858418; Fri, 1 Apr 2022 22:19:24 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 46B6A3858418 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work084)] Update ChangeLog.meissner. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work084 X-Git-Oldrev: 2f15ec148d0e52c7ec4649cb98e7e9998fac366a X-Git-Newrev: 982211f6a06ff1050f05394f8d5ace85f0b15fa8 Message-Id: <20220401221924.46B6A3858418@sourceware.org> Date: Fri, 1 Apr 2022 22:19:24 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 01 Apr 2022 22:19:24 -0000 https://gcc.gnu.org/g:982211f6a06ff1050f05394f8d5ace85f0b15fa8 commit 982211f6a06ff1050f05394f8d5ace85f0b15fa8 Author: Michael Meissner Date: Fri Apr 1 18:18:54 2022 -0400 Update ChangeLog.meissner. 2022-04-01 Michael Meissner gcc/ * ChangeLog.meissner: Update. Diff: --- gcc/ChangeLog.meissner | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index c7e98861615..e6ad03fd49c 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,27 @@ +==================== Work084, patch #5: + +Add zero_extendditi2. Improve lxvr*x code generation. + +This pattern adds zero_extendditi2 so that if we are extending DImode to +TImode, and we want the result in a vector register, the compiler can +generate MTVSRDDD. + +In addition the patterns for generating lxvr{b,h,w,d}x and stxvr{b,h,w,d}x +were tuned to allow loading to gpr registers and storing from gpr +registers. This prevents needlessly doing direct moves to get the value +into the vector registers if the gpr register was already selected. + +2022-04-01 Michael Meissner + +gcc/ + * config/rs6000/vsx.md (vsx_lxvrx): Add support for loading to + GPR registers. + (vsx_stxvrx): Add support for storing from GPR registers. + (zero_extendditi2): New insn. + +gcc/testsuite/ + * gcc.target/powerpc/zero-extend-di-ti.c: New test. + ==================== Work084, patch #4: Add zero_extendditi2.