From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id DC8153858C50; Thu, 7 Apr 2022 20:24:44 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org DC8153858C50 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work085)] Update ChangeLog.meissner. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work085 X-Git-Oldrev: 2fe27fea89a31b19975fa299ff6cb7aa8adb4a79 X-Git-Newrev: 3fb9446e67d8a3bb81eda0f64d3b82622999999c Message-Id: <20220407202444.DC8153858C50@sourceware.org> Date: Thu, 7 Apr 2022 20:24:44 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Apr 2022 20:24:45 -0000 https://gcc.gnu.org/g:3fb9446e67d8a3bb81eda0f64d3b82622999999c commit 3fb9446e67d8a3bb81eda0f64d3b82622999999c Author: Michael Meissner Date: Thu Apr 7 16:23:45 2022 -0400 Update ChangeLog.meissner. 2022-04-07 Michael Meissner gcc/ * ChangeLog.meissner: Update. Diff: --- gcc/ChangeLog.meissner | 102 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index 4e39b994616..f7eef06b3e6 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,105 @@ +==================== Work086, patch #3: + +Replace UNSPEC with RTL code for extendditi2. + +When I submitted my patch on March 12th for extendditi2, Segher wished I +had removed the use of the UNSPEC for the vextsd2q instruction. This +patch rewrites extendditi2_vector to use VEC_SELECT rather than UNSPEC. + + +2022-03-31 Michael Meissner + +gcc/ + * config/rs6000/vsx.md (UNSPEC_EXTENDDITI2): Delete. + (extendditi2_vector): Rewrite to use VEC_SELECT as a + define_expand. + (extendditi2_vector2): New insn. + +==================== Work086, patch #2: + +Optimize vec_splats of constant vec_extract for V2DI/V2DF, PR target 99293. + +This is version 2 of the patch. The original patch was: + +| Date: Mon, 28 Mar 2022 12:26:02 -0400 +| Subject: [PATCH 1/4] Optimize vec_splats of constant vec_extract for V2DI/V2DF, PR target 99293. +| Message-ID: +| https://gcc.gnu.org/pipermail/gcc-patches/2022-March/592420.html + +In PR target/99293, it was pointed out that doing: + + vector long long dest0, dest1, src; + /* ... */ + dest0 = vec_splats (vec_extract (src, 0)); + dest1 = vec_splats (vec_extract (src, 1)); + +would generate slower code. + +It generates the following code on power8: + + ;; vec_splats (vec_extract (src, 0)) + xxpermdi 0,34,34,3 + xxpermdi 34,0,0,0 + + ;; vec_splats (vec_extract (src, 1)) + xxlor 0,34,34 + xxpermdi 34,0,0,0 + +However on power9 and power10 it generates: + + ;; vec_splats (vec_extract (src, 0)) + mfvsld 3,34 + mtvsrdd 34,9,9 + + ;; vec_splats (vec_extract (src, 1)) + mfvsrd 9,34 + mtvsrdd 34,9,9 + +This is due to the power9 having the mfvsrld instruction which can extract +either 64-bit element into a GPR. While there are alternatives for both +vector registers and GPR registers, the register allocator prefers to put +DImode into GPR registers. + +However in this case, it is better to have a single combiner pattern that +can generate a single xxpermdi, instead of doing 2 insnsns (the extract +and then the concat). This is particularly true if the two operations are +move from vector register and move to vector register. As Segher pointed +out in a previous version of the patch, the combiner already tries doing +creating a (vec_duplicate (vec_select ...)) pattern, but we didn't provide +one. + +This patch reworks vsx_xxspltd_ for V2DImode and V2DFmode so that it +no longer uses an UNSPEC. Instead it uses VEC_DUPLICATE, which the +combiner checks for. + +I have built Spec 2017 with this patch installed, and the cam4_r benchmark +is the only benchmark that generated different code (3 mfvsrld/mtvsrdd +pairs of instructions were replaced with xxpermdi). + +I have built bootstrap versions on the following systems and I have run +the regression tests. There were no regressions in the runs: + + Power9 little endian, --with-cpu=power9 + Power10 little endian, --with-cpu=power10 + Power8 big endian, --with-cpu=power8 (both 32-bit & 64-bit tests) + +Can I install this into the trunk? After a burn-in period, can I backport +and install this into GCC 11 and GCC 10 branches? + +2022-03-30 Michael Meissner + +gcc/ + PR target/99293 + * config/rs6000/rs6000-p8swap.cc (rtx_is_swappable_p): Remove + UNSPEC_VSX_XXSPLTD case. + * config/rs6000/vsx.md (UNSPEC_VSX_XXSPLTD): Delete. + (vsx_xxspltd_): Rewrite to use VEC_DUPLICATE. + +gcc/testsuite: + PR target/99293 + * gcc.target/powerpc/builtins-1.c: Update insn count. + * gcc.target/powerpc/pr99293.c: New test. + ==================== Work086, patch #1: Disable float128 tests on VxWorks.