From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id E67453858D1E; Mon, 11 Apr 2022 18:14:30 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E67453858D1E Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work085)] Update ChangeLog.meissner. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work085 X-Git-Oldrev: 64cdf19f31f815c5b604a37432ae52541711ce0c X-Git-Newrev: 7fb4061124bbcb8010f4190dbe4db4c1cac5b4b7 Message-Id: <20220411181430.E67453858D1E@sourceware.org> Date: Mon, 11 Apr 2022 18:14:30 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 11 Apr 2022 18:14:31 -0000 https://gcc.gnu.org/g:7fb4061124bbcb8010f4190dbe4db4c1cac5b4b7 commit 7fb4061124bbcb8010f4190dbe4db4c1cac5b4b7 Author: Michael Meissner Date: Mon Apr 11 14:14:13 2022 -0400 Update ChangeLog.meissner. 2022-04-11 Michael Meissner gcc/ * ChangeLog.meissner: Update. Diff: --- gcc/ChangeLog.meissner | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index 9c1e8865b25..a1b6ed52c67 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,41 @@ +==================== Work086, patch #7: + +Optimize multiply/add of DImode extended to TImode. + +On power9 and power10 systems, we have instructions that support doing +64-bit integers converted to 128-bit integers and producing 128-bit +results. This patch adds support to generate these instructions. + +Previously GCC had define_expands to handle conversion of the 64-bit +extend to 128-bit and multiply. This patch changes these define_expands +to define_insn_and_split and then it provides combiner patterns to +generate thes multiply/add instructions. + +To support using this optimization on power9, this patch extend the sign +extend DImode to TImode to also run on power9 (added for PR +target/104698). + +This patch needs the previous patch to add unsigned DImode to TImode +conversion so that the combiner can combine the extend, multiply, and add +instructions. + + +2022-04-05 Michael Meissner + +gcc/ + PR target/103109 + * config/rs6000/rs6000.md (su_int32): New code attribute. + (mul3): Convert from define_expand to + define_insn_and_split. + (maddld4): Add generator function. + (mulditi3_adddi3): New insn. + (mulditi3_add_const): New insn. + (mulditi3_adddi3_upper): New insn. + +gcc/testsuite/ + PR target/103109 + * gcc.target/powerpc/pr103109.c: New test. + ==================== Work086, patch #6: Add zero_extendditi2. Improve lxvr*x code generation.