[gcc r11-9836] rs6000: Handle pcrel sibcalls to longcall functions [PR104894]

[gcc r11-9836] rs6000: Handle pcrel sibcalls to longcall functions [PR104894]

[Peter Bergner]

https://gcc.gnu.org/g:5ede37c0f274f0de19afd662588891e32b60f705

commit r11-9836-g5ede37c0f274f0de19afd662588891e32b60f705
Author: Peter Bergner <bergner@linux.ibm.com>
Date:   Tue Apr 12 14:08:53 2022 -0500

    rs6000: Handle pcrel sibcalls to longcall functions [PR104894]
    
    Before PCREL in POWER10, we were not allowed to perform sibcalls to longcall
    functions since callee's return would skip the TOC restore in the caller.
    However, with PCREL we can now safely perform a sibling call to longcall
    functions.  The problem with the current code is that pcrel sibcall
    branches to a PLT stub label even though -fno-plt was used.  The solution
    here is to check for a pcrel longcall and emit an inline plt stub in
    that case.
    
    2022-04-11  Peter Bergner  <bergner@linux.ibm.com>
    
    gcc/
            PR target/104894
            * config/rs6000/rs6000.c (rs6000_sibcall_aix): Handle pcrel sibcalls
            to longcall functions.
    
    gcc/testsuite/
            PR target/104894
            * gcc.target/powerpc/pr104894.c: New test.
            * gcc.target/powerpc/pr104894-2.c: New test.
    
    (cherry picked from commit d74c4c6a1b4956b5cd9b2a770bb7261836fa1289)

Diff:
---
 gcc/config/rs6000/rs6000.c                    | 13 +++++++++++--
 gcc/testsuite/gcc.target/powerpc/pr104894-2.c | 22 ++++++++++++++++++++++
 gcc/testsuite/gcc.target/powerpc/pr104894.c   | 20 ++++++++++++++++++++
 3 files changed, 53 insertions(+), 2 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 1b482a8d904..608f30146e7 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -25368,11 +25368,20 @@ rs6000_sibcall_aix (rtx value, rtx func_desc, rtx tlsarg, rtx cookie)
   rtx r12 = NULL_RTX;
   rtx func_addr = func_desc;
 
-  gcc_assert (INTVAL (cookie) == 0);
-
   if (global_tlsarg)
     tlsarg = global_tlsarg;
 
+  /* Handle longcall attributes.  */
+  if (INTVAL (cookie) & CALL_LONG && SYMBOL_REF_P (func_desc))
+    {
+      /* PCREL can do a sibling call to a longcall function
+	 because we don't need to restore the TOC register.  */
+      gcc_assert (rs6000_pcrel_p ());
+      func_desc = rs6000_longcall_ref (func_desc, tlsarg);
+    }
+  else
+    gcc_assert (INTVAL (cookie) == 0);
+
   /* For ELFv2, r12 and CTR need to hold the function address
      for an indirect call.  */
   if (GET_CODE (func_desc) != SYMBOL_REF && DEFAULT_ABI == ABI_ELFv2)
diff --git a/gcc/testsuite/gcc.target/powerpc/pr104894-2.c b/gcc/testsuite/gcc.target/powerpc/pr104894-2.c
new file mode 100644
index 00000000000..d1a011ef4d9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr104894-2.c
@@ -0,0 +1,22 @@
+/* PR target/104894 */
+/* { dg-require-effective-target powerpc_elfv2 } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10 -fno-plt" } */
+
+/* Verify we do not ICE on the following test case and that we emit one
+   indirect call and one indirect sibcall, with r12 and CTR containing
+   the function addresses.  */
+
+void foo (void);
+
+void
+bar (void)
+{
+  foo ();
+  foo ();
+}
+
+/* { dg-final { scan-assembler-times {\mmtctr 12\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mbctrl\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbctr\M} 1 } } */
+/* { dg-final { scan-assembler-not {\mbl\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr104894.c b/gcc/testsuite/gcc.target/powerpc/pr104894.c
new file mode 100644
index 00000000000..f46fe88168f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr104894.c
@@ -0,0 +1,20 @@
+/* PR target/104894 */
+/* { dg-require-effective-target powerpc_elfv2 } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10 -fno-plt" } */
+
+/* Verify we do not ICE on the following test case and that we emit an
+   indirect sibcall, with r12 and CTR containing the function address.  */
+
+void foo (void);
+
+void
+bar (void)
+{
+  foo ();
+}
+
+/* { dg-final { scan-assembler-times {\mmtctr 12\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mbctr\M} 1 } } */
+/* { dg-final { scan-assembler-not {\mbl\M} } } */
+/* { dg-final { scan-assembler-not {\mbctrl\M} } } */