[gcc(refs/users/meissner/heads/work085)] Update ChangeLog.meissner.

[Michael Meissner <meissner@gcc.gnu.org>]

https://gcc.gnu.org/g:053c68d9cb8422460874ab6daaf110c4b42e1126

commit 053c68d9cb8422460874ab6daaf110c4b42e1126
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Apr 14 16:19:03 2022 -0400

    Update ChangeLog.meissner.
    
    2022-04-14   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index c4fec7b0639..459e8e4e9d1 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,21 @@
+==================== Work086, patch #9:
+
+Generate vadduqm and vsubuqm for TImode add/subtract
+
+If the TImode variable is in an Altivec register instead of a GPR
+register, then generate vadduqm and vsubuqm instead of having to move the
+value to the GPR registers and doing the add and subtract with carry
+instructions.  To do this, we have to delay the splitting of the addition
+and subtraction until after register allocation.
+
+2022-03-22   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+	* config/rs6000/rs6000.md (addti3): Generate vadduqm if we are
+	using the Altivec registers.
+	(subti3): Generate vsubuqm if we using the Altivec registers.
+	(negti3): New insn.
+
 ==================== Work086, patch #8:
 
 Eliminate power8 fusion options, use power8 tuning, PR target/102059