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From: Michael Meissner <meissner@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work086)] Update ChangeLog.meissner. Date: Thu, 21 Apr 2022 16:59:28 +0000 (GMT) [thread overview] Message-ID: <20220421165928.1F20C3857360@sourceware.org> (raw) https://gcc.gnu.org/g:a072126e929c37b1976bb091e5236004bbaecb24 commit a072126e929c37b1976bb091e5236004bbaecb24 Author: Michael Meissner <meissner@linux.ibm.com> Date: Thu Apr 21 12:59:04 2022 -0400 Update ChangeLog.meissner. 2022-04-21 Michael Meissner <meissner@linux.ibm.com> gcc/ * ChangeLog.meissner: Update. Diff: --- gcc/ChangeLog.meissner | 73 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index 241e66373f8..b5da965f94e 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,76 @@ +==================== work086 patch #1: +Eliminate power8 fusion options, use power8 tuning, PR target/102059 + +This is V4 of the patch. Compared to V3 of the patch, GCC will just +ignore -m{,no-}power8-fusion and -m{,no-}power8-fusion-sign. + +The splitting of signed halfword and word loads into unsigned load and +sign extension is now suppressed with -Os, but it is done normally if we +are not optimizing for space. + +The power8 fusion support used to be set automatically when -mcpu=power8 or +-mtune=power8 was used, and it was cleared for other cpu's. However, if you +used the target attribute or target #pragma to change the default cpu type or +tuning, you would get an error that a target specifiction option mismatch +occurred. + +This occurred because the rs6000_can_inline_p function just compares the ISA +bits between the called inline function and the caller. If the ISA flags of +the called function is not a subset of the ISA flags of the caller, we won't do +the inlinging. When a power9 or power10 function inlines a function that is +explicitly compiled for power8, the power8 function has the power8 fusion bits +set and the power9 or power10 functions do not have the fusion bits set. + +This code makes the -mpower8-fusion option a nop. It is accepted without +warning, but it does nothing. Power8 fusion is only enabled if we are tuning +for a power8. + +The undocumented -mpower8-fusion-sign option is also made into a nop. + +I left in the pragma target and attribute target support for power8-fusion, but +using it doesn't do anything now. This is because I told the customer who +encountered this problem that one solution was to add an explicit +no-power8-fusion option in their target pragma or attribute to work around the +problem. + +I have tested this patch on a little endian power10 system. I have tested +previous versions on little endian power9 and big endian power8 systems. +Can I apply this patch to the master branch? + +If it is accepted, I will produce a similar patch for back porting to GCC 11 +and GCC 10. + +2022-04-21 Michael Meissner <meissner@linux.ibm.com> + +gcc/ + PR target/102059 + * config/rs6000/rs6000-cpus.def (OTHER_FUSION_MASKS): Delete. + (ISA_3_0_MASKS_SERVER): Don't clear the fusion masks. + (POWERPC_MASKS): Remove OPTION_MASK_P8_FUSION. + * config/rs6000/rs6000.cc (rs6000_option_override_internal): + Delete code that set the power8 fusion options automatically. + (rs6000_opt_masks): Allow #pragma target and attribute target + power8-fusion option for backwards compatibility. + (rs6000_print_options_internal): Skip printing backward + compatibility options that are just ignored. + * config/rs6000/rs6000.h (TARGET_P8_FUSION): New macro. + (TARGET_P8_FUSION_SIGN): Likewise. + (MASK_P8_FUSION): Delete. + * config/rs6000/rs6000.opt (-mpower8-fusion): Recognize the option but + ignore it completely. + (-mpower8-fusion-sign): Likewise. + * doc/invoke.texi (RS/6000 and PowerPC Options): Delete + -mpower8-fusion. + +gcc/testsuite/ + PR target/102059 + * gcc.dg/lto/pr102059-1_0.c: Remove -mno-power8-fusion. + * gcc.dg/lto/pr102059-2_0.c: Likewise. + * gcc.target/powerpc/pr102059-3.c: Likewise. + * gcc.target/powerpc/pr102059-4.c: New test. + +==================== Setup + 2022-04-21 Michael Meissner <meissner@linux.ibm.com> Clone branch
next reply other threads:[~2022-04-21 16:59 UTC|newest] Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-04-21 16:59 Michael Meissner [this message] 2022-04-21 18:26 Michael Meissner
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