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From: Segher Boessenkool <segher@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r12-8222] rs6000/testsuite: xfail bswap-brw.c
Date: Thu, 21 Apr 2022 21:31:24 +0000 (GMT)	[thread overview]
Message-ID: <20220421213124.954143856DC7@sourceware.org> (raw)

https://gcc.gnu.org/g:748d46cd049c89a799f99f14547267ebae915af6

commit r12-8222-g748d46cd049c89a799f99f14547267ebae915af6
Author: Segher Boessenkool <segher@kernel.crashing.org>
Date:   Thu Apr 21 18:35:32 2022 +0000

    rs6000/testsuite: xfail bswap-brw.c
    
    This testcase does not generate anywhere near optimal code for 32-bit
    code.  For p10 it actually now fails this testcase, after the previous
    patch.  Let's xfail it.
    
    2022-04-21  Segher Boessenkool  <segher@kernel.crashing.org>
    
    gcc/testsuite/
            PR target/103197
            PR target/102146
            * gcc.target/powerpc/bswap-brw.c: Add xfail on scan-assembler for -m32.

Diff:
---
 gcc/testsuite/gcc.target/powerpc/bswap-brw.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/testsuite/gcc.target/powerpc/bswap-brw.c b/gcc/testsuite/gcc.target/powerpc/bswap-brw.c
index b3f923eea84..0ed2a7bd1d2 100644
--- a/gcc/testsuite/gcc.target/powerpc/bswap-brw.c
+++ b/gcc/testsuite/gcc.target/powerpc/bswap-brw.c
@@ -17,6 +17,6 @@ bswap_int_dbl (unsigned int a)
   /* Force the value to be loaded into a vector register.  */
   __asm__ (" # %x0" : "+wa" (b));
 
-  /* { dg-final { scan-assembler {\mxxbrw\M} } } */
+  /* { dg-final { scan-assembler {\mxxbrw\M} {xfail {has_arch_pwr10 && {! has_arch_ppc64}}} } } */
   return (double) __builtin_bswap32 (b);
 }


                 reply	other threads:[~2022-04-21 21:31 UTC|newest]

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