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From: Alexandre Oliva <aoliva@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/aoliva/heads/testme)] Reject unaligned subregs when strict alignment is required Date: Thu, 5 May 2022 06:31:54 +0000 (GMT) [thread overview] Message-ID: <20220505063154.EFA3D3856265@sourceware.org> (raw) https://gcc.gnu.org/g:b119a4098423b7c6bf4dcc2fdc59efb95c79d570 commit b119a4098423b7c6bf4dcc2fdc59efb95c79d570 Author: Alexandre Oliva <oliva@adacore.com> Date: Wed May 4 23:41:39 2022 -0300 Reject unaligned subregs when strict alignment is required The testcase for pr100106, compiled with optimization for 32-bit powerpc -mcpu=604 with -mstrict-align expands the initialization of a union from a float _Complex value into a load from an SCmode constant pool entry, aligned to 4 bytes, into a DImode pseudo, requiring 8-byte alignment. The patch that introduced the testcase modified simplify_subreg to avoid changing the MEM to outermode, but simplify_gen_subreg still creates a SUBREG or a MEM that would require stricter alignment than MEM's, and lra_constraints appears to get confused by that, repeatedly creating unsatisfiable reloads for the SUBREG until it exceeds the insn count. Avoiding the unaligned SUBREG, expand splits the DImode dest into SUBREGs and loads each SImode word of the constant pool with the proper alignment. for gcc/ChangeLog PR target/100106 * emit-rtl.c (validate_subreg): Reject a SUBREG of a MEM that requires stricter alignment than MEM's. for gcc/testsuite/ChangeLog PR target/100106 * gcc.target/powerpc/pr100106-sa.c: New. Diff: --- gcc/emit-rtl.cc | 3 +++ gcc/testsuite/gcc.target/powerpc/pr100106-sa.c | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/gcc/emit-rtl.cc b/gcc/emit-rtl.cc index 1e02ae254d0..642e47eada0 100644 --- a/gcc/emit-rtl.cc +++ b/gcc/emit-rtl.cc @@ -982,6 +982,9 @@ validate_subreg (machine_mode omode, machine_mode imode, return subreg_offset_representable_p (regno, imode, offset, omode); } + else if (reg && MEM_P (reg) + && STRICT_ALIGNMENT && MEM_ALIGN (reg) < GET_MODE_ALIGNMENT (omode)) + return false; /* The outer size must be ordered wrt the register size, otherwise we wouldn't know at compile time how many registers the outer diff --git a/gcc/testsuite/gcc.target/powerpc/pr100106-sa.c b/gcc/testsuite/gcc.target/powerpc/pr100106-sa.c new file mode 100644 index 00000000000..6cc29595c8b --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr100106-sa.c @@ -0,0 +1,4 @@ +/* { dg-do compile { target { ilp32 } } } */ +/* { dg-options "-mcpu=604 -O -mstrict-align" } */ + +#include "../../gcc.c-torture/compile/pr100106.c"
next reply other threads:[~2022-05-05 6:31 UTC|newest] Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-05 6:31 Alexandre Oliva [this message] -- strict thread matches above, loose matches on Subject: below -- 2022-05-05 2:42 Alexandre Oliva
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