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From: Matthew Malcomson <matmal01@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/vendors/ARM/heads/morello)] aarch64: Use mem_address_mode more often Date: Thu, 5 May 2022 12:04:34 +0000 (GMT) [thread overview] Message-ID: <20220505120434.94C7F385DC09@sourceware.org> (raw) https://gcc.gnu.org/g:125322e97a6df7fdea5f28a4971db1ec7d22046d commit 125322e97a6df7fdea5f28a4971db1ec7d22046d Author: Richard Sandiford <richard.sandiford@arm.com> Date: Thu Mar 3 16:00:07 2022 +0000 aarch64: Use mem_address_mode more often This patch generalises various plus_constant (Pmode, ...) calls to plus_constant (mem_address_mode (x), ...) calls, when offseting the address of x. I didn't add a helper for this because plus_constant is really the wrong interface to be using for this kind of equality check. Recent upstream takes a different approach (see g:958448a9441ee54e012c67cfc3cf88083f3d0e4a) and I have further LDP/STP tweaks queued for GCC 13. Diff: --- gcc/config/aarch64/aarch64-simd.md | 14 +++++++------- gcc/config/aarch64/aarch64.c | 2 +- gcc/config/aarch64/aarch64.md | 16 ++++++++-------- 3 files changed, 16 insertions(+), 16 deletions(-) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 48b9f07e5b0..aaf89944ec1 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -184,7 +184,7 @@ (match_operand:DREG2 3 "memory_operand" "m"))] "TARGET_SIMD && rtx_equal_p (XEXP (operands[3], 0), - plus_constant (Pmode, + plus_constant (mem_address_mode (operands[1]), XEXP (operands[1], 0), GET_MODE_SIZE (<DREG:MODE>mode)))" "ldp\\t%d0, %d2, %z1" @@ -198,7 +198,7 @@ (match_operand:DREG2 3 "register_operand" "w"))] "TARGET_SIMD && rtx_equal_p (XEXP (operands[2], 0), - plus_constant (Pmode, + plus_constant (mem_address_mode (operands[0]), XEXP (operands[0], 0), GET_MODE_SIZE (<DREG:MODE>mode)))" "stp\\t%d1, %d3, %z0" @@ -212,9 +212,9 @@ (match_operand:VQ2 3 "memory_operand" "m"))] "TARGET_SIMD && rtx_equal_p (XEXP (operands[3], 0), - plus_constant (Pmode, - XEXP (operands[1], 0), - GET_MODE_SIZE (<VQ:MODE>mode)))" + plus_constant (mem_address_mode (operands[1]), + XEXP (operands[1], 0), + GET_MODE_SIZE (<VQ:MODE>mode)))" "ldp\\t%q0, %q2, %z1" [(set_attr "type" "neon_ldp_q")] ) @@ -225,7 +225,7 @@ (set (match_operand:VQ2 2 "memory_operand" "=m") (match_operand:VQ2 3 "register_operand" "w"))] "TARGET_SIMD && rtx_equal_p (XEXP (operands[2], 0), - plus_constant (Pmode, + plus_constant (mem_address_mode (operands[0]), XEXP (operands[0], 0), GET_MODE_SIZE (<VQ:MODE>mode)))" "stp\\t%q1, %q3, %z0" @@ -3279,7 +3279,7 @@ (match_operand:VDC 2 "memory_operand" "m")))] "TARGET_SIMD && !STRICT_ALIGNMENT && rtx_equal_p (XEXP (operands[2], 0), - plus_constant (Pmode, + plus_constant (mem_address_mode (operands[1]), XEXP (operands[1], 0), GET_MODE_SIZE (<MODE>mode)))" "ldr\\t%q0, %1" diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 53b6956e78a..94863bb8188 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -19688,7 +19688,7 @@ aarch64_expand_vector_init (rtx target, rtx vals) && memory_operand (x1, inner_mode) && !STRICT_ALIGNMENT && rtx_equal_p (XEXP (x1, 0), - plus_constant (Pmode, + plus_constant (mem_address_mode (x0), XEXP (x0, 0), GET_MODE_SIZE (inner_mode)))) { diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 82116242938..2d989044f46 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -1602,7 +1602,7 @@ (set (match_operand:SX2 2 "register_operand" "=r,w") (match_operand:SX2 3 "memory_operand" "m,m"))] "rtx_equal_p (XEXP (operands[3], 0), - plus_constant (Pmode, + plus_constant (mem_address_mode (operands[1]), XEXP (operands[1], 0), GET_MODE_SIZE (<SX:MODE>mode)))" "@ @@ -1619,7 +1619,7 @@ (set (match_operand:DXC2 2 "register_operand" "=r,w") (match_operand:DXC2 3 "memory_operand" "m,m"))] "rtx_equal_p (XEXP (operands[3], 0), - plus_constant (Pmode, + plus_constant (mem_address_mode (operands[1]), XEXP (operands[1], 0), GET_MODE_SIZE (<DXC:MODE>mode)))" "@ @@ -1636,7 +1636,7 @@ (match_operand:TF 3 "memory_operand" "m"))] "TARGET_SIMD && rtx_equal_p (XEXP (operands[3], 0), - plus_constant (Pmode, + plus_constant (mem_address_mode (operands[1]), XEXP (operands[1], 0), GET_MODE_SIZE (TFmode)))" "ldp\\t%q0, %q2, %z1" @@ -1652,7 +1652,7 @@ (set (match_operand:SX2 2 "memory_operand" "=m,m") (match_operand:SX2 3 "aarch64_reg_zero_or_fp_zero" "rYZ,w"))] "rtx_equal_p (XEXP (operands[2], 0), - plus_constant (Pmode, + plus_constant (mem_address_mode (operands[0]), XEXP (operands[0], 0), GET_MODE_SIZE (<SX:MODE>mode)))" "@ @@ -1669,7 +1669,7 @@ (set (match_operand:DXC2 2 "memory_operand" "=m,m") (match_operand:DXC2 3 "aarch64_reg_zero_or_fp_zero" "rYZ,w"))] "rtx_equal_p (XEXP (operands[2], 0), - plus_constant (Pmode, + plus_constant (mem_address_mode (operands[0]), XEXP (operands[0], 0), GET_MODE_SIZE (<DXC:MODE>mode)))" "@ @@ -1686,7 +1686,7 @@ (match_operand:TF 3 "register_operand" "w"))] "TARGET_SIMD && rtx_equal_p (XEXP (operands[2], 0), - plus_constant (Pmode, + plus_constant (mem_address_mode (operands[0]), XEXP (operands[0], 0), GET_MODE_SIZE (TFmode)))" "stp\\t%q1, %q3, %z0" @@ -1832,7 +1832,7 @@ (set (match_operand:DI 2 "register_operand" "=r") (sign_extend:DI (match_operand:SI 3 "memory_operand" "m")))] "rtx_equal_p (XEXP (operands[3], 0), - plus_constant (Pmode, + plus_constant (mem_address_mode (operands[1]), XEXP (operands[1], 0), GET_MODE_SIZE (SImode)))" "ldpsw\\t%0, %2, %z1" @@ -1860,7 +1860,7 @@ (set (match_operand:DI 2 "register_operand" "=r,w") (zero_extend:DI (match_operand:SI 3 "memory_operand" "m,m")))] "rtx_equal_p (XEXP (operands[3], 0), - plus_constant (Pmode, + plus_constant (mem_address_mode (operands[1]), XEXP (operands[1], 0), GET_MODE_SIZE (SImode)))" "@
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