From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2049) id 1D87D3856242; Thu, 5 May 2022 12:05:10 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1D87D3856242 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Matthew Malcomson To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/vendors/ARM/heads/morello)] Hybrid Morello: Update -mabi CLI to align better with Clang X-Act-Checkin: gcc X-Git-Author: Stam Markianos-Wright X-Git-Refname: refs/vendors/ARM/heads/morello X-Git-Oldrev: 272ae0194290f681d19acffa2d03f4e1ea8b355d X-Git-Newrev: 43a2618e7dfcc01b548442152f4effc232502f3e Message-Id: <20220505120510.1D87D3856242@sourceware.org> Date: Thu, 5 May 2022 12:05:10 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 05 May 2022 12:05:10 -0000 https://gcc.gnu.org/g:43a2618e7dfcc01b548442152f4effc232502f3e commit 43a2618e7dfcc01b548442152f4effc232502f3e Author: Stam Markianos-Wright Date: Thu Apr 7 11:24:20 2022 +0100 Hybrid Morello: Update -mabi CLI to align better with Clang Hybrid Morello is defined as: -march=morello and -mabi=lp64 (base A64 APCS), it just architecturally has the ability to use Morello instructions and capabilities that had been marked as __capability in the user's source code. That means that we do not explicitly need any -mabi=hybrid flag and clang does not implement one either, so that is removed. The Hybrid ABI option internally is also not needed and is removed (the simpler we can keep this the better). Diff: --- gcc/c/c-decl.c | 2 +- gcc/config/aarch64/aarch64.c | 36 +++++++++++++++++++++--------------- gcc/config/aarch64/aarch64.h | 5 ++--- gcc/config/aarch64/aarch64.opt | 3 --- gcc/config/aarch64/arm_fp16.h | 2 +- gcc/config/aarch64/arm_neon.h | 14 +++++++------- 6 files changed, 32 insertions(+), 30 deletions(-) diff --git a/gcc/c/c-decl.c b/gcc/c/c-decl.c index fc05a0163c6..2f63317ec4c 100644 --- a/gcc/c/c-decl.c +++ b/gcc/c/c-decl.c @@ -5978,7 +5978,7 @@ test_fake_hybrid (void) { static int fake_hybrid_counter; - if (!flag_fake_hybrid) + if (!flag_fake_hybrid || !targetm.capability_mode ().exists ()) return false; if (flag_fake_hybrid_init < flag_fake_hybrid) diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 6d159dec463..6853d9004bd 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -15105,26 +15105,32 @@ aarch64_override_options_internal (struct gcc_options *opts) aarch64_tune_params = *(selected_tune->tune); aarch64_architecture_version = selected_arch->architecture_version; - /* MORELLO TODO. - Currently just using the standard LP64 ABI rather than propogating the - alternate ABI's across the backend. */ - if (opts->x_aarch64_abi > AARCH64_ABI_ILP32) + if (AARCH64_ISA_C64 || selected_arch->arch == AARCH64_ARCH_MORELLO) { - if (selected_arch->arch != AARCH64_ARCH_MORELLO) - error ("must use %<-march=morello%> when selecting a morello ABI"); switch (opts->x_aarch64_abi) { - case AARCH64_ABI_MORELLO_HYBRID: - aarch64_cap = AARCH64_CAPABILITY_HYBRID; - break; - case AARCH64_ABI_MORELLO_PURECAP: - aarch64_cap = AARCH64_CAPABILITY_PURE; - break; - default: - gcc_unreachable (); + case AARCH64_ABI_ILP32: + error ("cannot use %<-mabi=ilp32%> with the Morello architecture"); + break; + case AARCH64_ABI_MORELLO_PURECAP: + aarch64_cap = AARCH64_CAPABILITY_PURE; + break; + case AARCH64_ABI_LP64: + aarch64_cap = AARCH64_CAPABILITY_HYBRID; + break; + default: + gcc_unreachable (); } - opts->x_aarch64_abi = AARCH64_ABI_LP64; } + else + { + if (opts->x_aarch64_abi == AARCH64_ABI_MORELLO_PURECAP) + error ("must use %<-march=morello%> or the %<+c64%> extension " + "when selecting the Morello %<-mabi=purecap%> ABI option"); + else + aarch64_cap = AARCH64_CAPABILITY_NONE; + } + /* We need the extension to be defined so that it gets passed down to the assembler. The assembler uses the architecture and extension to decide what state the processor should be in (which also defines some parts of diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 4bd00bcc498..f9fcb173f60 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -977,15 +977,14 @@ enum aarch64_abi_type etc, but allows us to use a more convenient separation of ideas in the backend. */ AARCH64_ABI_MORELLO_PURECAP = 2, - AARCH64_ABI_MORELLO_HYBRID = 3, - AARCH64_ABI_MORELLO_FAKE = 4 + AARCH64_ABI_MORELLO_FAKE = 3 }; #ifndef AARCH64_ABI_DEFAULT #define AARCH64_ABI_DEFAULT AARCH64_ABI_LP64 #endif -#define TARGET_ILP32 (aarch64_abi & AARCH64_ABI_ILP32) +#define TARGET_ILP32 (aarch64_abi == AARCH64_ABI_ILP32) enum aarch64_capability { AARCH64_CAPABILITY_NONE, diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt index 959de5c96fd..f34382ec774 100644 --- a/gcc/config/aarch64/aarch64.opt +++ b/gcc/config/aarch64/aarch64.opt @@ -155,9 +155,6 @@ Enum(aarch64_abi) String(lp64) Value(AARCH64_ABI_LP64) EnumValue Enum(aarch64_abi) String(purecap) Value(AARCH64_ABI_MORELLO_PURECAP) -EnumValue -Enum(aarch64_abi) String(hybrid) Value(AARCH64_ABI_MORELLO_HYBRID) - mfake-capability Target Var(aarch64_using_fake_capability, 1) Init(0) Determine whether we use the internal fake capability representation. diff --git a/gcc/config/aarch64/arm_fp16.h b/gcc/config/aarch64/arm_fp16.h index b1c40ea6044..52d2e71e7b7 100644 --- a/gcc/config/aarch64/arm_fp16.h +++ b/gcc/config/aarch64/arm_fp16.h @@ -32,7 +32,7 @@ #pragma GCC push_options #ifdef __ARM_FEATURE_C64 -#pragma GCC target ("arch=morello+c64+fp16") +#pragma GCC target ("arch=armv8.2-a+c64+fp16") #else #pragma GCC target ("arch=armv8.2-a+fp16") #endif diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index 45e86a844bd..18ed012259e 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -32214,7 +32214,7 @@ __INTERLEAVE_LIST (zip) #pragma GCC push_options #ifdef __ARM_FEATURE_C64 -#pragma GCC target ("arch=morello+c64+fp16") +#pragma GCC target ("arch=armv8.2-a+c64+fp16") #else #pragma GCC target ("arch=armv8.2-a+fp16") #endif @@ -33382,7 +33382,7 @@ vminnmvq_f16 (float16x8_t __a) #pragma GCC push_options #ifdef __ARM_FEATURE_C64 -#pragma GCC target ("arch=morello+c64") +#pragma GCC target ("arch=armv8.2-a+c64+dotprod") #else #pragma GCC target ("arch=armv8.2-a+dotprod") #endif @@ -33478,7 +33478,7 @@ vdotq_laneq_s32 (int32x4_t __r, int8x16_t __a, int8x16_t __b, const int __index) #pragma GCC push_options #ifdef __ARM_FEATURE_C64 -#pragma GCC target ("arch=morello+c64+sm4") +#pragma GCC target ("arch=armv8.2-a+c64+sm4") #else #pragma GCC target ("arch=armv8.2-a+sm4") #endif @@ -33550,7 +33550,7 @@ vsm4ekeyq_u32 (uint32x4_t __a, uint32x4_t __b) #pragma GCC push_options #ifdef __ARM_FEATURE_C64 -#pragma GCC target ("arch=morello+c64+sha3") +#pragma GCC target ("arch=armv8.2-a+c64+sha3") #else #pragma GCC target ("arch=armv8.2-a+sha3") #endif @@ -34196,7 +34196,7 @@ vcmlaq_rot270_laneq_f32 (float32x4_t __r, float32x4_t __a, float32x4_t __b, #pragma GCC push_options #ifdef __ARM_FEATURE_C64 -#pragma GCC target ("arch=morello+c64+fp16fml") +#pragma GCC target ("arch=armv8.2-a+c64+fp16fml") #else #pragma GCC target ("arch=armv8.2-a+fp16fml") #endif @@ -34515,7 +34515,7 @@ vrnd64xq_f64 (float64x2_t __a) #pragma GCC push_options #ifdef __ARM_FEATURE_C64 -#pragma GCC target ("arch=morello+c64+bf16") +#pragma GCC target ("arch=armv8.2-a+c64+bf16") #else #pragma GCC target ("arch=armv8.2-a+bf16") #endif @@ -35598,7 +35598,7 @@ vcvtq_high_bf16_f32 (bfloat16x8_t __inactive, float32x4_t __a) #pragma GCC push_options #ifdef __ARM_FEATURE_C64 -#pragma GCC target ("arch=morello+c64+i8mm") +#pragma GCC target ("arch=armv8.2-a+c64+i8mm") #else #pragma GCC target ("arch=armv8.2-a+i8mm") #endif