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From: Michael Meissner <meissner@gcc.gnu.org>
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Subject: [gcc(refs/users/meissner/heads/work089)] Update ChangeLog.meissner.
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https://gcc.gnu.org/g:5770edf7bada1142cbbdc90b4f4b44d0a263ea6d

commit 5770edf7bada1142cbbdc90b4f4b44d0a263ea6d
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu May 12 18:56:08 2022 -0400

    Update ChangeLog.meissner.
    
    2022-05-12   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index acc5d7be01c..6b65b1a3120 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,24 @@
+==================== work089 patch #7
+
+Generate vadduqm and vsubuqm for TImode add/subtract
+
+If the TImode variable is in an Altivec register instead of a GPR
+register, then generate vadduqm and vsubuqm instead of having to move the
+value to the GPR registers and doing the add and subtract with carry
+instructions.  To do this, we have to delay the splitting of the addition
+and subtraction until after register allocation.
+
+2022-05-12   Michael Meissner  <meissner@linux.ibm.com>
+
+gcc/
+	* config/rs6000/rs6000.md (addti3): Generate vadduqm if we are
+	using the Altivec registers.
+	(subti3): Generate vsubuqm if we using the Altivec registers.
+	(negti3): New insn.
+
+gcc/testsuite/
+	* gcc.target/powerpc/vadduqm-vsubuqm.c: New test.
+
 ==================== work089 patch #6
 
 Optimize multiply/add of DImode extended to TImode, PR target/103109.