From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1579) id D3528385840C; Tue, 17 May 2022 20:55:34 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org D3528385840C MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Pat Haugen To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-574] Fix register count when not splitting Complex IEEE 128-bit args. X-Act-Checkin: gcc X-Git-Author: Pat Haugen X-Git-Refname: refs/heads/master X-Git-Oldrev: 47554478a13f64bff1ee4b9bb0319ae63d42ca52 X-Git-Newrev: 2ee68beee709e48fce85b8892ff9985acc6a91a8 Message-Id: <20220517205534.D3528385840C@sourceware.org> Date: Tue, 17 May 2022 20:55:34 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 17 May 2022 20:55:34 -0000 https://gcc.gnu.org/g:2ee68beee709e48fce85b8892ff9985acc6a91a8 commit r13-574-g2ee68beee709e48fce85b8892ff9985acc6a91a8 Author: Pat Haugen Date: Tue May 17 15:53:24 2022 -0500 Fix register count when not splitting Complex IEEE 128-bit args. For ABI_V4, we do not split complex args. This created a problem because even though an arg would be passed in two VSX regs, we were only advancing the function arg counter by one VSX register. Fixed with this patch. PR target/99685 gcc/ * config/rs6000/rs6000-call.cc (rs6000_function_arg_advance_1): Bump register count when not splitting IEEE 128-bit Complex. Diff: --- gcc/config/rs6000/rs6000-call.cc | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/gcc/config/rs6000/rs6000-call.cc b/gcc/config/rs6000/rs6000-call.cc index 6011fe8d3c5..551968b0995 100644 --- a/gcc/config/rs6000/rs6000-call.cc +++ b/gcc/config/rs6000/rs6000-call.cc @@ -1111,6 +1111,12 @@ rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, machine_mode mode, { cum->vregno += n_elts; + /* If we are not splitting Complex IEEE128 args then account for the + fact that they are passed in 2 VSX regs. */ + if (!targetm.calls.split_complex_arg && type + && TREE_CODE (type) == COMPLEX_TYPE && elt_mode == KCmode) + cum->vregno++; + if (!TARGET_ALTIVEC) error ("cannot pass argument in vector register because" " altivec instructions are disabled, use %qs"