[gcc r13-1049] Disable generating load/store vector pairs for block copies.

[Michael Meissner <meissner@gcc.gnu.org>]

https://gcc.gnu.org/g:fddb7f65129a12dabb5ddc3c8082fe576f4af451

commit r13-1049-gfddb7f65129a12dabb5ddc3c8082fe576f4af451
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Sat Jun 11 00:40:16 2022 -0400

    Disable generating load/store vector pairs for block copies.
    
    Testing has found that using load and store vector pair for block copies
    can result in a slow down on power10.  This patch disables using the
    vector pair instructions for block copies if we are tuning for power10.
    
    2022-06-11   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
            * config/rs6000/rs6000.cc (rs6000_option_override_internal): Do
            not generate block copies with vector pair instructions if we are
            tuning for power10.

Diff:
---
 gcc/config/rs6000/rs6000.cc | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 0af2085adc0..59481d9ac70 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -4141,7 +4141,10 @@ rs6000_option_override_internal (bool global_init_p)
 
   if (!(rs6000_isa_flags_explicit & OPTION_MASK_BLOCK_OPS_VECTOR_PAIR))
     {
-      if (TARGET_MMA && TARGET_EFFICIENT_UNALIGNED_VSX)
+      /* Do not generate lxvp and stxvp on power10 since there are some
+	 performance issues.  */
+      if (TARGET_MMA && TARGET_EFFICIENT_UNALIGNED_VSX
+	  && rs6000_tune != PROCESSOR_POWER10)
 	rs6000_isa_flags |= OPTION_MASK_BLOCK_OPS_VECTOR_PAIR;
       else
 	rs6000_isa_flags &= ~OPTION_MASK_BLOCK_OPS_VECTOR_PAIR;