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From: Maciej W. Rozycki <macro@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-1075] RISC-V: Reset the length to the default of 4 for FP comparisons Date: Mon, 13 Jun 2022 21:30:54 +0000 (GMT) [thread overview] Message-ID: <20220613213054.E8AC438515F6@sourceware.org> (raw) https://gcc.gnu.org/g:72b185189f914a412ae39776cd284dfaeaf2213b commit r13-1075-g72b185189f914a412ae39776cd284dfaeaf2213b Author: Maciej W. Rozycki <macro@embecosm.com> Date: Mon Jun 13 22:29:45 2022 +0100 RISC-V: Reset the length to the default of 4 for FP comparisons The default length for floating-point compare operations is overridden to 8, however the FEQ.fmt, FLT.fmt, FLE.fmt machine instructions and FGE.fmt, FGT.fmt assembly idioms the relevant RTL insns produce are all 4 bytes long each. And all the floating-point compare RTL insns that produce multiple machine instructions explicitly set their lengths. Remove the override then, letting the default of 4 apply for the single instruction case. gcc/ * config/riscv/riscv.md (length): Remove the explicit setting for "fcmp". Diff: --- gcc/config/riscv/riscv.md | 2 -- 1 file changed, 2 deletions(-) diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index 7745290383b..308b64dd30d 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -231,8 +231,6 @@ (eq_attr "got" "load") (const_int 8) - (eq_attr "type" "fcmp") (const_int 8) - ;; SHIFT_SHIFTs are decomposed into two separate instructions. (eq_attr "move_type" "shift_shift") (const_int 8)
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