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From: Vladimir Makarov <vmakarov@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r11-10064] [PR104637] LRA: Split hard regs as many as possible on one subpass Date: Tue, 14 Jun 2022 15:48:47 +0000 (GMT) [thread overview] Message-ID: <20220614154847.0EA373853578@sourceware.org> (raw) https://gcc.gnu.org/g:776283dd1946f1563a59d8f527697e0206f5390e commit r11-10064-g776283dd1946f1563a59d8f527697e0206f5390e Author: Vladimir N. Makarov <vmakarov@redhat.com> Date: Mon Feb 28 16:43:50 2022 -0500 [PR104637] LRA: Split hard regs as many as possible on one subpass LRA hard reg split subpass is a small subpass used as the last resort for LRA when it can not assign a hard reg to a reload pseudo by other ways (e.g. by spilling non-reload pseudos). For simplicity the subpass works on one split base (as each split changes pseudo live range info). In this case it results in reaching maximal possible number of subpasses. The patch implements as many non-overlapping hard reg splits splits as possible on each subpass. gcc/ChangeLog: PR rtl-optimization/104637 * lra-assigns.c (lra_split_hard_reg_for): Split hard regs as many as possible on one subpass. gcc/testsuite/ChangeLog: PR rtl-optimization/104637 * gcc.target/i386/pr104637.c: New. Diff: --- gcc/lra-assigns.c | 42 ++++++++++++++++++++++++++------ gcc/testsuite/gcc.target/i386/pr104637.c | 22 +++++++++++++++++ 2 files changed, 57 insertions(+), 7 deletions(-) diff --git a/gcc/lra-assigns.c b/gcc/lra-assigns.c index b406096a39c..0ec0a79080a 100644 --- a/gcc/lra-assigns.c +++ b/gcc/lra-assigns.c @@ -1775,8 +1775,8 @@ lra_split_hard_reg_for (void) iterations. Either it's an asm and something is wrong with the constraints, or we have run out of spill registers; error out in either case. */ - bool asm_p = false; - bitmap_head failed_reload_insns, failed_reload_pseudos; + bool asm_p = false, spill_p = false; + bitmap_head failed_reload_insns, failed_reload_pseudos, over_split_insns; if (lra_dump_file != NULL) fprintf (lra_dump_file, @@ -1787,6 +1787,7 @@ lra_split_hard_reg_for (void) bitmap_ior (&non_reload_pseudos, &lra_inheritance_pseudos, &lra_split_regs); bitmap_ior_into (&non_reload_pseudos, &lra_subreg_reload_pseudos); bitmap_ior_into (&non_reload_pseudos, &lra_optional_reload_pseudos); + bitmap_initialize (&over_split_insns, ®_obstack); for (i = lra_constraint_new_regno_start; i < max_regno; i++) if (reg_renumber[i] < 0 && lra_reg_info[i].nrefs != 0 && (rclass = lra_get_allocno_class (i)) != NO_REGS @@ -1794,14 +1795,41 @@ lra_split_hard_reg_for (void) { if (! find_reload_regno_insns (i, first, last)) continue; - if (BLOCK_FOR_INSN (first) == BLOCK_FOR_INSN (last) - && spill_hard_reg_in_range (i, rclass, first, last)) + if (BLOCK_FOR_INSN (first) == BLOCK_FOR_INSN (last)) { - bitmap_clear (&failed_reload_pseudos); - return true; + /* Check that we are not trying to split over the same insn + requiring reloads to avoid splitting the same hard reg twice or + more. If we need several hard regs splitting over the same insn + it can be finished on the next iterations. + + The following loop iteration number is small as we split hard + reg in a very small range. */ + for (insn = first; + insn != NEXT_INSN (last); + insn = NEXT_INSN (insn)) + if (bitmap_bit_p (&over_split_insns, INSN_UID (insn))) + break; + if (insn != NEXT_INSN (last) + || !spill_hard_reg_in_range (i, rclass, first, last)) + { + bitmap_set_bit (&failed_reload_pseudos, i); + } + else + { + for (insn = first; + insn != NEXT_INSN (last); + insn = NEXT_INSN (insn)) + bitmap_set_bit (&over_split_insns, INSN_UID (insn)); + spill_p = true; + } } - bitmap_set_bit (&failed_reload_pseudos, i); } + bitmap_clear (&over_split_insns); + if (spill_p) + { + bitmap_clear (&failed_reload_pseudos); + return true; + } bitmap_clear (&non_reload_pseudos); bitmap_initialize (&failed_reload_insns, ®_obstack); EXECUTE_IF_SET_IN_BITMAP (&failed_reload_pseudos, 0, u, bi) diff --git a/gcc/testsuite/gcc.target/i386/pr104637.c b/gcc/testsuite/gcc.target/i386/pr104637.c new file mode 100644 index 00000000000..65e8635d55e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr104637.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-Og -fno-forward-propagate -mavx" } */ + +typedef short __attribute__((__vector_size__ (64))) U; +typedef unsigned long long __attribute__((__vector_size__ (32))) V; +typedef long double __attribute__((__vector_size__ (64))) F; + +int i; +U u; +F f; + +void +foo (char a, char b, _Complex char c, V v) +{ + u = (U) { u[0] / 0, u[1] / 0, u[2] / 0, u[3] / 0, u[4] / 0, u[5] / 0, u[6] / 0, u[7] / 0, + u[8] / 0, u[0] / 0, u[9] / 0, u[10] / 0, u[11] / 0, u[12] / 0, u[13] / 0, u[14] / 0, u[15] / 0, + u[16] / 0, u[17] / 0, u[18] / 0, u[19] / 0, u[20] / 0, u[21] / 0, u[22] / 0, u[23] / 0, + u[24] / 0, u[25] / 0, u[26] / 0, u[27] / 0, u[28] / 0, u[29] / 0, u[30] / 0, u[31] / 0 }; + c += i; + f = (F) { v[0], v[1], v[2], v[3] }; + i = (char) (__imag__ c + i); +}
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