From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2078) id 336E93858C51; Wed, 15 Jun 2022 05:55:57 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 336E93858C51 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset="utf-8" From: hongtao Liu To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-1099] Fix ICE in extract_insn, at recog.cc:2791 X-Act-Checkin: gcc X-Git-Author: liuhongt X-Git-Refname: refs/heads/master X-Git-Oldrev: 4adc5350fe239aa449c75b5cc98a37d4f00012d6 X-Git-Newrev: 4b1a827f024234aaf83ecfe90415e88b525d3969 Message-Id: <20220615055557.336E93858C51@sourceware.org> Date: Wed, 15 Jun 2022 05:55:57 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Jun 2022 05:55:57 -0000 https://gcc.gnu.org/g:4b1a827f024234aaf83ecfe90415e88b525d3969 commit r13-1099-g4b1a827f024234aaf83ecfe90415e88b525d3969 Author: liuhongt Date: Tue Jun 14 16:27:04 2022 +0800 Fix ICE in extract_insn, at recog.cc:2791 (In reply to Uroš Bizjak from comment #1) > Instruction does not accept memory operand for operand 3: > > (define_insn_and_split > "*_blendv_ltint" > [(set (match_operand: 0 "register_operand" "=Yr,*x,x") > (unspec: > [(match_operand: 1 "register_operand" "0,0,x") > (match_operand: 2 "vector_operand" "YrBm,*xBm,xm") > (subreg: > (lt:VI48_AVX > (match_operand:VI48_AVX 3 "register_operand" "Yz,Yz,x") > (match_operand:VI48_AVX 4 "const0_operand")) 0)] > UNSPEC_BLENDV))] > > The problematic insn is: > > (define_insn_and_split "*avx_cmp3_ltint_not" > [(set (match_operand:VI48_AVX 0 "register_operand") > (vec_merge:VI48_AVX > (match_operand:VI48_AVX 1 "vector_operand") > (match_operand:VI48_AVX 2 "vector_operand") > (unspec: > [(subreg:VI48_AVX > (not: > (match_operand: 3 "vector_operand")) 0) > (match_operand:VI48_AVX 4 "const0_operand") > (match_operand:SI 5 "const_0_to_7_operand")] > UNSPEC_PCMP)))] > > which gets split to the above pattern. > > In the preparation statements we have: > > if (!MEM_P (operands[3])) > operands[3] = force_reg (mode, operands[3]); > operands[3] = lowpart_subreg (mode, operands[3], mode); > > Which won't fly when operand 3 is memory operand... > gcc/ChangeLog: PR target/105953 * config/i386/sse.md (*avx_cmp3_ltint_not): Force_reg operands[3]. gcc/testsuite/ChangeLog: * g++.target/i386/pr105953.C: New test. Diff: --- gcc/config/i386/sse.md | 3 +-- gcc/testsuite/g++.target/i386/pr105953.C | 4 ++++ 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 75609eaf9b7..3e3d96fe087 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -3643,8 +3643,7 @@ gen_lowpart (mode, operands[1])); operands[2] = gen_lowpart (mode, operands[2]); - if (!MEM_P (operands[3])) - operands[3] = force_reg (mode, operands[3]); + operands[3] = force_reg (mode, operands[3]); operands[3] = lowpart_subreg (mode, operands[3], mode); }) diff --git a/gcc/testsuite/g++.target/i386/pr105953.C b/gcc/testsuite/g++.target/i386/pr105953.C new file mode 100644 index 00000000000..b423d2dfdae --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr105953.C @@ -0,0 +1,4 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl -mabi=ms" } */ + +#include "pr100738-1.C"