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From: Richard Earnshaw <rearnsha@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-1152] arm: fix checking ICE in arm_print_operand [PR106004] Date: Fri, 17 Jun 2022 13:27:28 +0000 (GMT) [thread overview] Message-ID: <20220617132728.88A94385355B@sourceware.org> (raw) https://gcc.gnu.org/g:040f8224617ad3924f606c8982da369f898693d1 commit r13-1152-g040f8224617ad3924f606c8982da369f898693d1 Author: Richard Earnshaw <rearnsha@arm.com> Date: Fri Jun 17 14:25:51 2022 +0100 arm: fix checking ICE in arm_print_operand [PR106004] Sigh, another instance where I incorrectly used XUINT instead of UINTVAL. I've also made the code here a little more robust (although I think this case can't in fact be reached) if the 32-bit clear mask includes bit 31. This case, if reached, would print out an out-of-range value based on the size of the compiler's HOST_WIDE_INT type due to sign-extension. We avoid this by masking the value after inversion. gcc/ChangeLog: PR target/106004 * config/arm/arm.cc (arm_print_operand, case 'V'): Use UINTVAL. Clear bits in the mask above bit 31. Diff: --- gcc/config/arm/arm.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index 2925907b436..33fb98d5cad 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -24199,7 +24199,8 @@ arm_print_operand (FILE *stream, rtx x, int code) return; } - unsigned HOST_WIDE_INT val = ~XUINT (x, 0); + unsigned HOST_WIDE_INT val + = ~UINTVAL (x) & HOST_WIDE_INT_UC (0xffffffff); int lsb = exact_log2 (val & -val); asm_fprintf (stream, "#%d, #%d", lsb, (exact_log2 (val + (val & -val)) - lsb));
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