From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1035) id E58943857825; Mon, 20 Jun 2022 15:20:12 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E58943857825 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Richard Earnshaw To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-1177] arm: more testsutie fallout for mve move-immediate changes X-Act-Checkin: gcc X-Git-Author: Richard Earnshaw X-Git-Refname: refs/heads/master X-Git-Oldrev: a78e5d307c69d4e91cd0e43d84e98be9593e68de X-Git-Newrev: 2eb3adb43eadead0d8666bc9f4dd4feab4bf7875 Message-Id: <20220620152012.E58943857825@sourceware.org> Date: Mon, 20 Jun 2022 15:20:12 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 20 Jun 2022 15:20:13 -0000 https://gcc.gnu.org/g:2eb3adb43eadead0d8666bc9f4dd4feab4bf7875 commit r13-1177-g2eb3adb43eadead0d8666bc9f4dd4feab4bf7875 Author: Richard Earnshaw Date: Mon Jun 20 16:18:36 2022 +0100 arm: more testsutie fallout for mve move-immediate changes Unfortunately, there is more fall-out in the testsuite for my changes to use MVE move-immediate operations instead of literal pool loads. Fixed as follows: gcc/testsuite/ChangeLog: * gcc.target/arm/simd/mve-vcmp-f32-2.c: Adjust expected output. * gcc.target/arm/simd/pr100757.c: Likewise. * gcc.target/arm/simd/pr100757-2.c: Likewise. * gcc.target/arm/simd/pr100757-3.c: Likewise. * gcc.target/arm/simd/pr100757-4.c: Likewise. Diff: --- gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32-2.c | 6 ++++-- gcc/testsuite/gcc.target/arm/simd/pr100757-2.c | 9 ++++++--- gcc/testsuite/gcc.target/arm/simd/pr100757-3.c | 9 ++++++--- gcc/testsuite/gcc.target/arm/simd/pr100757-4.c | 10 +++++++--- gcc/testsuite/gcc.target/arm/simd/pr100757.c | 9 ++++++--- 5 files changed, 29 insertions(+), 14 deletions(-) diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32-2.c b/gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32-2.c index 917a95bf141..2440cef267e 100644 --- a/gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32-2.c +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32-2.c @@ -28,5 +28,7 @@ FUNC(>=, vcmpge) /* { dg-final { scan-assembler-times {\tvcmp.f32\tle, q[0-9]+, q[0-9]+\n} 1 } } */ /* { dg-final { scan-assembler-times {\tvcmp.f32\tgt, q[0-9]+, q[0-9]+\n} 1 } } */ /* { dg-final { scan-assembler-times {\tvcmp.f32\tge, q[0-9]+, q[0-9]+\n} 1 } } */ -/* { dg-final { scan-assembler-times {\t.word\t1073741824\n} 24 } } */ /* Constant 2.0f. */ -/* { dg-final { scan-assembler-times {\t.word\t1077936128\n} 24 } } */ /* Constant 3.0f. */ +/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #2\.0e\+0 @ v4sf} 6 } } */ +/* { dg-final { scan-assembler-not {\t.word\t1073741824\n} } } */ /* Constant 2.0f. */ +/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #3\.0e\+0 @ v4sf} 6 } } */ +/* { dg-final { scan-assembler-not {\t.word\t1077936128\n} } } */ /* Constant 3.0f. */ diff --git a/gcc/testsuite/gcc.target/arm/simd/pr100757-2.c b/gcc/testsuite/gcc.target/arm/simd/pr100757-2.c index c2262b4d81e..21426fee370 100644 --- a/gcc/testsuite/gcc.target/arm/simd/pr100757-2.c +++ b/gcc/testsuite/gcc.target/arm/simd/pr100757-2.c @@ -13,8 +13,11 @@ int fn1(int d) { return c; } -/* { dg-final { scan-assembler-times {\t.word\t1073741824\n} 4 } } */ /* Constant 2.0f. */ -/* { dg-final { scan-assembler-times {\t.word\t4\n} 4 } } */ /* Initial value for c. */ -/* { dg-final { scan-assembler-times {\t.word\t5\n} 4 } } */ /* Possible value for c. */ +/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #2\.0e\+0 @ v4sf} 1 } } */ +/* { dg-final { scan-assembler-not {\t.word\t1073741824\n} } } */ +/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0x4 @ v4si} 1 } } */ +/* { dg-final { scan-assembler-not {\t.word\t4\n} } } */ +/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0x5 @ v4si} 1 } } */ +/* { dg-final { scan-assembler-not {\t.word\t5\n} } } */ /* { dg-final { scan-assembler-not {\t.word\t1\n} } } */ /* 'true' mask. */ /* { dg-final { scan-assembler-not {\t.word\t0\n} } } */ /* 'false' mask. */ diff --git a/gcc/testsuite/gcc.target/arm/simd/pr100757-3.c b/gcc/testsuite/gcc.target/arm/simd/pr100757-3.c index e604555c04c..1640a447ee5 100644 --- a/gcc/testsuite/gcc.target/arm/simd/pr100757-3.c +++ b/gcc/testsuite/gcc.target/arm/simd/pr100757-3.c @@ -13,8 +13,11 @@ float fn1(int d) { return c; } -/* { dg-final { scan-assembler-times {\t.word\t1073741824\n} 4 } } */ /* Constant 2.0f. */ -/* { dg-final { scan-assembler-times {\t.word\t1084227584\n} 4 } } */ /* Initial value for c (4.0). */ -/* { dg-final { scan-assembler-times {\t.word\t1082130432\n} 4 } } */ /* Possible value for c (5.0). */ +/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #2\.0e\+0 @ v4sf} 1 } } */ +/* { dg-final { scan-assembler-not {\t.word\t1073741824\n} } } */ +/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #4\.0e\+0 @ v4sf} 1 } } */ +/* { dg-final { scan-assembler-not {\t.word\t1084227584\n} } } */ +/* { dg-final { scan-assembler-times {\tvmov\.f32\tq[0-7], #5\.0e\+0 @ v4sf} 1 } } */ +/* { dg-final { scan-assembler-not {\t.word\t1082130432\n} } } */ /* { dg-final { scan-assembler-not {\t.word\t1\n} } } */ /* 'true' mask. */ /* { dg-final { scan-assembler-not {\t.word\t0\n} } } */ /* 'false' mask. */ diff --git a/gcc/testsuite/gcc.target/arm/simd/pr100757-4.c b/gcc/testsuite/gcc.target/arm/simd/pr100757-4.c index c12040c517f..7431494d62d 100644 --- a/gcc/testsuite/gcc.target/arm/simd/pr100757-4.c +++ b/gcc/testsuite/gcc.target/arm/simd/pr100757-4.c @@ -13,7 +13,11 @@ int fn1(int d) { return c; } -/* { dg-final { scan-assembler-times {\t.word\t0\n} 4 } } */ /* 'false' mask. */ + +/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0 @ v4si} 1 } } */ +/* { dg-final { scan-assembler-not {\t.word\t0\n} } } */ /* 'false' mask. */ /* { dg-final { scan-assembler-not {\t.word\t1\n} } } */ /* 'true' mask. */ -/* { dg-final { scan-assembler-times {\t.word\t2\n} 4 } } */ /* Initial value for c. */ -/* { dg-final { scan-assembler-times {\t.word\t3\n} 4 } } */ /* Possible value for c. */ +/* { dg-final { scan-assembler-times {vmov\.i32\tq[0-7], #0x2 @ v4si} 1 } } */ +/* { dg-final { scan-assembler-not {\t.word\t2\n} } } */ /* Initial value for c. */ +/* { dg-final { scan-assembler-times {vmov\.i32\tq[0-7], #0x3 @ v4si} 1 } } */ +/* { dg-final { scan-assembler-not {\t.word\t3\n} } } */ /* Possible value for c. */ diff --git a/gcc/testsuite/gcc.target/arm/simd/pr100757.c b/gcc/testsuite/gcc.target/arm/simd/pr100757.c index 41d6e4e2d7a..f1ef1bd2aec 100644 --- a/gcc/testsuite/gcc.target/arm/simd/pr100757.c +++ b/gcc/testsuite/gcc.target/arm/simd/pr100757.c @@ -13,7 +13,10 @@ int fn1(int d) { return c; } -/* { dg-final { scan-assembler-times {\t.word\t0\n} 4 } } */ /* 'false' mask. */ +/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0 @ v4si} 1 } } */ +/* { dg-final { scan-assembler-not {\t.word\t0\n} } } */ /* 'false' mask. */ /* { dg-final { scan-assembler-not {\t.word\t1\n} } } */ /* 'true' mask. */ -/* { dg-final { scan-assembler-times {\t.word\t2\n} 4 } } */ /* Initial value for c. */ -/* { dg-final { scan-assembler-times {\t.word\t3\n} 4 } } */ /* Possible value for c. */ +/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0x2 @ v4si} 1 } } */ +/* { dg-final { scan-assembler-not {\t.word\t2\n} } } */ /* Initial value for c. */ +/* { dg-final { scan-assembler-times {\tvmov\.i32\tq[0-7], #0x3 @ v4si} 1 } } */ +/* { dg-final { scan-assembler-not {\t.word\t3\n} } } */ /* Possible value for c. */