From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 1B70F3858010; Thu, 30 Jun 2022 19:22:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1B70F3858010 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work093)] Update ChangeLog.meissner. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work093 X-Git-Oldrev: c22d66bfe9ee3258766682cf337ee232c7803a2f X-Git-Newrev: 15de9d7f205a30384967465144e0f1ecdb9a262b Message-Id: <20220630192248.1B70F3858010@sourceware.org> Date: Thu, 30 Jun 2022 19:22:48 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 30 Jun 2022 19:22:48 -0000 https://gcc.gnu.org/g:15de9d7f205a30384967465144e0f1ecdb9a262b commit 15de9d7f205a30384967465144e0f1ecdb9a262b Author: Michael Meissner Date: Thu Jun 30 15:22:31 2022 -0400 Update ChangeLog.meissner. 2022-06-30 Michael Meissner gcc/ * ChangeLog.meissner: Update. Diff: --- gcc/ChangeLog.meissner | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index 99c1921e305..a45b642e5d9 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,32 @@ +==================== work093, patch #5 + +Overload IEEE 128-bit extract and insert support. + +2022-06-30 Michael Meissner + +gcc/ + + * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Remove + converting KFmode IEEE insert and extract built-in functions to + TFmode insert and extract built-in functions when long double is + IEEE 128-bit. + * config/rs6000/rs6000-builtins.def + (__builtin_vsx_scalar_extract_expq_kf): Rename KFmode IEEE 128-bit + insert and extract built-in functions to have a KF suffix to allow + overloading. + (__builtin_vsx_scalar_extract_sigq_kf): Likewise. + (__builtin_vsx_scalar_insert_exp_qp_kf): Likewise. + (__builtin_vsx_scalar_extract_expq_tf): Add TFmode variants for + IEEE 128-bit insert and extract support. + (__builtin_vsx_scalar_extract_sigq_tf): Likewise. + (__builtin_vsx_scalar_insert_exp_qp_tf): Likewise. + * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin): + Add support for having KFmode and TFmode variants of VSIEQPF. + * config/rs6000/rs6000-overload.def + (__builtin_vec_scalar_extract_exp): Add TFmode overloads. + (__builtin_vec_scalar_extract_sig): Likewise. + (__builtin_vec_scalar_insert_exp): Likewise. + ==================== work093, patch #4 Overload IEEE 128-bit scalar eq, gt, lt, and unordered built-ins.