From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id B7D573858D39; Thu, 30 Jun 2022 20:25:27 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org B7D573858D39 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work093)] Revert patch. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work093 X-Git-Oldrev: 15de9d7f205a30384967465144e0f1ecdb9a262b X-Git-Newrev: fbe8920ce1728a64bd288430080f11525c68f0c2 Message-Id: <20220630202527.B7D573858D39@sourceware.org> Date: Thu, 30 Jun 2022 20:25:27 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 30 Jun 2022 20:25:27 -0000 https://gcc.gnu.org/g:fbe8920ce1728a64bd288430080f11525c68f0c2 commit fbe8920ce1728a64bd288430080f11525c68f0c2 Author: Michael Meissner Date: Thu Jun 30 16:24:56 2022 -0400 Revert patch. 2022-06-30 Michael Meissner gcc/ Revert patch. * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Remove converting KFmode IEEE insert and extract built-in functions to TFmode insert and extract built-in functions when long double is IEEE 128-bit. * config/rs6000/rs6000-builtins.def (__builtin_vsx_scalar_extract_expq_kf): Rename KFmode IEEE 128-bit insert and extract built-in functions to have a KF suffix to allow overloading. (__builtin_vsx_scalar_extract_sigq_kf): Likewise. (__builtin_vsx_scalar_insert_exp_qp_kf): Likewise. (__builtin_vsx_scalar_extract_expq_tf): Add TFmode variants for IEEE 128-bit insert and extract support. (__builtin_vsx_scalar_extract_sigq_tf): Likewise. (__builtin_vsx_scalar_insert_exp_qp_tf): Likewise. * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin): Add support for having KFmode and TFmode variants of VSIEQPF. * config/rs6000/rs6000-overload.def (__builtin_vec_scalar_extract_exp): Add TFmode overloads. (__builtin_vec_scalar_extract_sig): Likewise. (__builtin_vec_scalar_insert_exp): Likewise. Diff: --- gcc/config/rs6000/rs6000-builtin.cc | 9 +++++++++ gcc/config/rs6000/rs6000-builtins.def | 26 +++++++------------------- gcc/config/rs6000/rs6000-c.cc | 10 ++++------ gcc/config/rs6000/rs6000-overload.def | 12 +++--------- 4 files changed, 23 insertions(+), 34 deletions(-) diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc index 49a4e6ed7b4..2e346d24db6 100644 --- a/gcc/config/rs6000/rs6000-builtin.cc +++ b/gcc/config/rs6000/rs6000-builtin.cc @@ -3318,12 +3318,21 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */, if (FLOAT128_IEEE_P (TFmode)) switch (icode) { + case CODE_FOR_xsxexpqp_kf: + icode = CODE_FOR_xsxexpqp_tf; + break; + case CODE_FOR_xsxsigqp_kf: + icode = CODE_FOR_xsxsigqp_tf; + break; case CODE_FOR_xststdcnegqp_kf: icode = CODE_FOR_xststdcnegqp_tf; break; case CODE_FOR_xsiexpqp_kf: icode = CODE_FOR_xsiexpqp_tf; break; + case CODE_FOR_xsiexpqpf_kf: + icode = CODE_FOR_xsiexpqpf_tf; + break; case CODE_FOR_xststdcqp_kf: icode = CODE_FOR_xststdcqp_tf; break; diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index 277d9e2f159..e96b89c449b 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -2902,21 +2902,19 @@ fpmath double __builtin_truncf128_round_to_odd_kf (_Float128); TRUNCF128_ODD_KF trunckfdf2_odd {} - const signed long long __builtin_vsx_scalar_extract_expq_kf (_Float128); - VSEEQP_KF xsxexpqp_kf {} + const signed long long __builtin_vsx_scalar_extract_expq (_Float128); + VSEEQP xsxexpqp_kf {} - const signed __int128 __builtin_vsx_scalar_extract_sigq_kf (_Float128); - VSESQP_KF xsxsigqp_kf {} + const signed __int128 __builtin_vsx_scalar_extract_sigq (_Float128); + VSESQP xsxsigqp_kf {} -; Note we cannot overload this function since it does not have KFmode -; or TFmode arguments. const _Float128 __builtin_vsx_scalar_insert_exp_q (unsigned __int128, \ unsigned long long); VSIEQP xsiexpqp_kf {} - const _Float128 __builtin_vsx_scalar_insert_exp_qp_kf (_Float128, \ - unsigned long long); - VSIEQPF_KF xsiexpqpf_kf {} + const _Float128 __builtin_vsx_scalar_insert_exp_qp (_Float128, \ + unsigned long long); + VSIEQPF xsiexpqpf_kf {} const signed int __builtin_vsx_scalar_test_data_class_qp (_Float128, \ const int<7>); @@ -2970,16 +2968,6 @@ fpmath double __builtin_truncf128_round_to_odd_tf (long double); TRUNCF128_ODD_TF trunctfdf2_odd {ieeeld} - const signed long long __builtin_vsx_scalar_extract_expq_tf (long double); - VSEEQP_TF xsxexpqp_tf {ieeeld} - - const signed __int128 __builtin_vsx_scalar_extract_sigq_tf (long double); - VSESQP_TF xsxsigqp_tf {ieeeld} - - const long double __builtin_vsx_scalar_insert_exp_qp_tf (_Float128, \ - unsigned long long); - VSIEQPF_TF xsiexpqpf_tf {} - ; Decimal floating-point builtins. [dfp] diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc index b9d3aa06e40..155233bfbcc 100644 --- a/gcc/config/rs6000/rs6000-c.cc +++ b/gcc/config/rs6000/rs6000-c.cc @@ -1939,13 +1939,11 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, 128-bit variant of built-in function. */ if (GET_MODE_PRECISION (arg1_mode) > 64) { - /* If first argument is of float variety, choose variant that - expects _Float128 argument (or long double if long doubles are - IEEE 128-bit). Otherwise, expect __int128 argument. */ + /* If first argument is of float variety, choose variant + that expects __ieee128 argument. Otherwise, expect + __int128 argument. */ if (GET_MODE_CLASS (arg1_mode) == MODE_FLOAT) - instance_code = ((arg1_mode == TFmode) - ? RS6000_BIF_VSIEQPF_TF - : RS6000_BIF_VSIEQPF_KF); + instance_code = RS6000_BIF_VSIEQPF; else instance_code = RS6000_BIF_VSIEQP; } diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def index 546883ece19..511a3821d5b 100644 --- a/gcc/config/rs6000/rs6000-overload.def +++ b/gcc/config/rs6000/rs6000-overload.def @@ -4506,17 +4506,13 @@ unsigned int __builtin_vec_scalar_extract_exp (double); VSEEDP unsigned int __builtin_vec_scalar_extract_exp (_Float128); - VSEEQP_KF - unsigned int __builtin_vec_scalar_extract_exp (long double); - VSEEQP_TF + VSEEQP [VEC_VSES, scalar_extract_sig, __builtin_vec_scalar_extract_sig] unsigned long long __builtin_vec_scalar_extract_sig (double); VSESDP unsigned __int128 __builtin_vec_scalar_extract_sig (_Float128); - VSESQP_KF - unsigned __int128 __builtin_vec_scalar_extract_sig (long double); - VSESQP_TF + VSESQP [VEC_VSIE, scalar_insert_exp, __builtin_vec_scalar_insert_exp] double __builtin_vec_scalar_insert_exp (unsigned long long, unsigned long long); @@ -4526,9 +4522,7 @@ _Float128 __builtin_vec_scalar_insert_exp (unsigned __int128, unsigned long long); VSIEQP _Float128 __builtin_vec_scalar_insert_exp (_Float128, unsigned long long); - VSIEQPF_KF - long double __builtin_vec_scalar_insert_exp (long double, unsigned long long); - VSIEQPF_TF + VSIEQPF [VEC_VSTDC, scalar_test_data_class, __builtin_vec_scalar_test_data_class] unsigned int __builtin_vec_scalar_test_data_class (float, const int);