public inbox for gcc-cvs@sourceware.org help / color / mirror / Atom feed
From: Michael Meissner <meissner@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work093)] Overload IEEE 128-bit extract and insert support. Date: Thu, 30 Jun 2022 20:27:43 +0000 (GMT) [thread overview] Message-ID: <20220630202743.87CB13858D39@sourceware.org> (raw) https://gcc.gnu.org/g:5690868799bb8b9b841840144cdca208ca6caf37 commit 5690868799bb8b9b841840144cdca208ca6caf37 Author: Michael Meissner <meissner@linux.ibm.com> Date: Thu Jun 30 16:27:26 2022 -0400 Overload IEEE 128-bit extract and insert support. 2022-06-30 Michael Meissner <meissner@linux.ibm.com> gcc/ * config/rs6000/rs6000-builtins.def (__builtin_vsx_scalar_extract_expq_kf): Rename KFmode IEEE 128-bit insert and extract built-in functions to have a KF suffix to allow overloading. (__builtin_vsx_scalar_extract_sigq_kf): Likewise. (__builtin_vsx_scalar_insert_exp_qp_kf): Likewise. (__builtin_vsx_scalar_extract_expq_tf): Add TFmode variants for IEEE 128-bit insert and extract support. (__builtin_vsx_scalar_extract_sigq_tf): Likewise. (__builtin_vsx_scalar_insert_exp_qp_tf): Likewise. * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin): Add support for having KFmode and TFmode variants of VSIEQPF. * config/rs6000/rs6000-overload.def (__builtin_vec_scalar_extract_exp): Add TFmode overloads. (__builtin_vec_scalar_extract_sig): Likewise. (__builtin_vec_scalar_insert_exp): Likewise. Diff: --- gcc/config/rs6000/rs6000-builtins.def | 26 +++++++++++++++++++------- gcc/config/rs6000/rs6000-c.cc | 10 ++++++---- gcc/config/rs6000/rs6000-overload.def | 12 +++++++++--- 3 files changed, 34 insertions(+), 14 deletions(-) diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index e96b89c449b..277d9e2f159 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -2902,19 +2902,21 @@ fpmath double __builtin_truncf128_round_to_odd_kf (_Float128); TRUNCF128_ODD_KF trunckfdf2_odd {} - const signed long long __builtin_vsx_scalar_extract_expq (_Float128); - VSEEQP xsxexpqp_kf {} + const signed long long __builtin_vsx_scalar_extract_expq_kf (_Float128); + VSEEQP_KF xsxexpqp_kf {} - const signed __int128 __builtin_vsx_scalar_extract_sigq (_Float128); - VSESQP xsxsigqp_kf {} + const signed __int128 __builtin_vsx_scalar_extract_sigq_kf (_Float128); + VSESQP_KF xsxsigqp_kf {} +; Note we cannot overload this function since it does not have KFmode +; or TFmode arguments. const _Float128 __builtin_vsx_scalar_insert_exp_q (unsigned __int128, \ unsigned long long); VSIEQP xsiexpqp_kf {} - const _Float128 __builtin_vsx_scalar_insert_exp_qp (_Float128, \ - unsigned long long); - VSIEQPF xsiexpqpf_kf {} + const _Float128 __builtin_vsx_scalar_insert_exp_qp_kf (_Float128, \ + unsigned long long); + VSIEQPF_KF xsiexpqpf_kf {} const signed int __builtin_vsx_scalar_test_data_class_qp (_Float128, \ const int<7>); @@ -2968,6 +2970,16 @@ fpmath double __builtin_truncf128_round_to_odd_tf (long double); TRUNCF128_ODD_TF trunctfdf2_odd {ieeeld} + const signed long long __builtin_vsx_scalar_extract_expq_tf (long double); + VSEEQP_TF xsxexpqp_tf {ieeeld} + + const signed __int128 __builtin_vsx_scalar_extract_sigq_tf (long double); + VSESQP_TF xsxsigqp_tf {ieeeld} + + const long double __builtin_vsx_scalar_insert_exp_qp_tf (_Float128, \ + unsigned long long); + VSIEQPF_TF xsiexpqpf_tf {} + ; Decimal floating-point builtins. [dfp] diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc index 155233bfbcc..b9d3aa06e40 100644 --- a/gcc/config/rs6000/rs6000-c.cc +++ b/gcc/config/rs6000/rs6000-c.cc @@ -1939,11 +1939,13 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, 128-bit variant of built-in function. */ if (GET_MODE_PRECISION (arg1_mode) > 64) { - /* If first argument is of float variety, choose variant - that expects __ieee128 argument. Otherwise, expect - __int128 argument. */ + /* If first argument is of float variety, choose variant that + expects _Float128 argument (or long double if long doubles are + IEEE 128-bit). Otherwise, expect __int128 argument. */ if (GET_MODE_CLASS (arg1_mode) == MODE_FLOAT) - instance_code = RS6000_BIF_VSIEQPF; + instance_code = ((arg1_mode == TFmode) + ? RS6000_BIF_VSIEQPF_TF + : RS6000_BIF_VSIEQPF_KF); else instance_code = RS6000_BIF_VSIEQP; } diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def index 511a3821d5b..546883ece19 100644 --- a/gcc/config/rs6000/rs6000-overload.def +++ b/gcc/config/rs6000/rs6000-overload.def @@ -4506,13 +4506,17 @@ unsigned int __builtin_vec_scalar_extract_exp (double); VSEEDP unsigned int __builtin_vec_scalar_extract_exp (_Float128); - VSEEQP + VSEEQP_KF + unsigned int __builtin_vec_scalar_extract_exp (long double); + VSEEQP_TF [VEC_VSES, scalar_extract_sig, __builtin_vec_scalar_extract_sig] unsigned long long __builtin_vec_scalar_extract_sig (double); VSESDP unsigned __int128 __builtin_vec_scalar_extract_sig (_Float128); - VSESQP + VSESQP_KF + unsigned __int128 __builtin_vec_scalar_extract_sig (long double); + VSESQP_TF [VEC_VSIE, scalar_insert_exp, __builtin_vec_scalar_insert_exp] double __builtin_vec_scalar_insert_exp (unsigned long long, unsigned long long); @@ -4522,7 +4526,9 @@ _Float128 __builtin_vec_scalar_insert_exp (unsigned __int128, unsigned long long); VSIEQP _Float128 __builtin_vec_scalar_insert_exp (_Float128, unsigned long long); - VSIEQPF + VSIEQPF_KF + long double __builtin_vec_scalar_insert_exp (long double, unsigned long long); + VSIEQPF_TF [VEC_VSTDC, scalar_test_data_class, __builtin_vec_scalar_test_data_class] unsigned int __builtin_vec_scalar_test_data_class (float, const int);
next reply other threads:[~2022-06-30 20:27 UTC|newest] Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-06-30 20:27 Michael Meissner [this message] -- strict thread matches above, loose matches on Subject: below -- 2022-07-01 7:10 Michael Meissner 2022-07-01 6:41 Michael Meissner 2022-06-30 19:21 Michael Meissner
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20220630202743.87CB13858D39@sourceware.org \ --to=meissner@gcc.gnu.org \ --cc=gcc-cvs@gcc.gnu.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).