From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 79D4E3858D1E; Wed, 13 Jul 2022 22:35:38 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 79D4E3858D1E Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work094)] Revert patches. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work094 X-Git-Oldrev: 8a6e5d64c3aaa164c3fbf1c771c5a8b996df5136 X-Git-Newrev: 7671a74edb88cc0f3b7a08d186893df36ed723cc Message-Id: <20220713223538.79D4E3858D1E@sourceware.org> Date: Wed, 13 Jul 2022 22:35:38 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 13 Jul 2022 22:35:38 -0000 https://gcc.gnu.org/g:7671a74edb88cc0f3b7a08d186893df36ed723cc commit 7671a74edb88cc0f3b7a08d186893df36ed723cc Author: Michael Meissner Date: Wed Jul 13 18:30:34 2022 -0400 Revert patches. 2022-07-13 Michael Meissner gcc/ Revert patches. * config/rs6000/rs6000-builtins.def (__builtin_vsx_scalar_extract_expq_kf): Rename KFmode IEEE 128-bit insert and extract built-in functions to have a KF suffix to allow overloading. (__builtin_vsx_scalar_extract_sigq_kf): Likewise. (__builtin_vsx_scalar_insert_exp_qp_kf): Likewise. (__builtin_vsx_scalar_extract_expq_tf): Add TFmode variants for IEEE 128-bit insert and extract support. (__builtin_vsx_scalar_extract_sigq_tf): Likewise. (__builtin_vsx_scalar_insert_exp_qp_tf): Likewise. * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin): Add support for having KFmode and TFmode variants of VSIEQPF. * config/rs6000/rs6000-overload.def (__builtin_vec_scalar_extract_exp): Add TFmode overloads. (__builtin_vec_scalar_extract_sig): Likewise. (__builtin_vec_scalar_insert_exp): Likewise. gcc/testsuite/ Revert patches. * gcc.target/powerpc/bfp/scalar-extract-exp-4.c: Update the expected error message. * gcc.target/powerpc/bfp/scalar-extract-sig-4.c: Likewise. * gcc.target/powerpc/bfp/scalar-insert-exp-10.c: Likewise. 2022-07-13 Michael Meissner gcc/ Revert patches. * config/rs6000/rs6000-builtins.def (__builtin_vsx_scalar_cmp_exp_qp_eq_kf): Rename KFmode comparison built-in functions to have a KF suffix to allow overloading. (__builtin_vsx_scalar_cmp_exp_qp_gt_kf): Likewise. (__builtin_vsx_scalar_cmp_exp_qp_lt_kf): Likewise. (__builtin_vsx_scalar_cmp_exp_qp_unordered_kf): Likewise. (__builtin_vsx_scalar_cmp_exp_qp_eq_tf): Add TFmode comparison built-in functions. (__builtin_vsx_scalar_cmp_exp_qp_gt_tf): Likewise. (__builtin_vsx_scalar_cmp_exp_qp_lt_tf): Likewise. (__builtin_vsx_scalar_cmp_exp_qp_unordered_tf): Likewise. * config/rs6000/rs6000-overload.def (__builtin_vec_scalar_cmp_exp_eq): Add TFmode overloaded functions. (__builtin_vec_scalar_cmp_exp_gt): Likewise. (__builtin_vec_scalar_cmp_exp_lt): Likewise. (__builtin_vec_scalar_cmp_exp_unordered): Likewise. 2022-07-13 Michael Meissner gcc/ Revert patches. * config/rs6000/rs6000-builtins.def (__builtin_addf128_round_to_odd_kf): Rename KFmode round to odd built-in functions with a KF suffix to allow overloading. (__builtin_divf128_round_to_odd_kf): Likewise. (__builtin_fmaf128_round_to_odd_kf): Likewise. (__builtin_mulf128_round_to_odd_kf): Likewise. (__builtin_sqrtf128_round_to_odd_kf): Likewise. (__builtin_subf128_round_to_odd_kf): Likewise. (__builtin_truncf128_round_to_odd_kf): Likewise. (__builtin_addf128_round_to_odd_tf): Add TFmode round to odd built-in functions. (__builtin_fmaf128_round_to_odd_tf): Likewise. (__builtin_mulf128_round_to_odd_tf): Likewise. (__builtin_sqrtf128_round_to_odd_tf): Likewise. (__builtin_subf128_round_to_odd_tf): Likewise. (__builtin_truncf128_round_to_odd_tf): Likewise. * config/rs6000/rs6000-overload.def (__builtin_addf128_round_to_odd): Make round to odd built-in functions overloaded. (__builtin_divf128_round_to_odd): Likewise. (__builtin_fmaf128_round_to_odd): Likewise. (__builtin_mulf128_round_to_odd): Likewise. (__builtin_sqrtf128_round_to_odd): Likewise. (__builtin_subf128_round_to_odd): Likewise. (__builtin_truncf128_round_to_odd): Likewise. 2022-07-13 Michael Meissner gcc/ Revert patches. * config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Add support for ibm128-hw-ld stanza. (rs6000_builtin_is_supported): Likewise. (rs6000_init_builtins): Likewise. (rs6000_expand_builtin): Add support for IEEE128_HW_LD. Add support for ieeeld. * config/rs6000/rs6000-builtins.def (toplevel): Add comment about the new ieeeld attribute. * config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add BSTZ_IEEE128_HW_LD. (stanza_map): Likewise. (enable_string): Likewise. (attrinfo): Add isieeeld. (parse_bif_attrs): Parse ieeeld. Add printing ieeeld to the debug print. (write_decls): Add support for ibm128-hw-ld stanza and ieeeld attribute. (write_bif_static_init): Add support for ieeeld attribute. Diff: --- gcc/config/rs6000/rs6000-builtin.cc | 18 ---- gcc/config/rs6000/rs6000-builtins.def | 117 ++++++--------------- gcc/config/rs6000/rs6000-c.cc | 10 +- gcc/config/rs6000/rs6000-gen-builtins.cc | 18 +--- gcc/config/rs6000/rs6000-overload.def | 72 ++----------- .../gcc.target/powerpc/bfp/scalar-extract-exp-4.c | 2 +- .../gcc.target/powerpc/bfp/scalar-extract-sig-4.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-10.c | 2 +- 8 files changed, 46 insertions(+), 195 deletions(-) diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc index 67e86bee781..2819773d9f9 100644 --- a/gcc/config/rs6000/rs6000-builtin.cc +++ b/gcc/config/rs6000/rs6000-builtin.cc @@ -123,10 +123,6 @@ rs6000_invalid_builtin (enum rs6000_gen_builtins fncode) case ENB_IEEE128_HW: error ("%qs requires quad-precision floating-point arithmetic", name); break; - case ENB_IEEE128_HW_LD: - error ("%qs requires %qs to use IEEE quad-precision floating-point " - "arithmetic", name, "long double"); - break; case ENB_DFP: error ("%qs requires the %qs option", name, "-mhard-dfp"); break; @@ -193,8 +189,6 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode) return TARGET_ALTIVEC && rs6000_cpu == PROCESSOR_CELL; case ENB_IEEE128_HW: return TARGET_FLOAT128_HW; - case ENB_IEEE128_HW_LD: - return TARGET_FLOAT128_HW && FLOAT128_IEEE_P (TFmode); case ENB_DFP: return TARGET_DFP; case ENB_CRYPTO: @@ -863,9 +857,6 @@ rs6000_init_builtins (void) continue; if (e == ENB_IEEE128_HW && !TARGET_FLOAT128_HW) continue; - if (e == ENB_IEEE128_HW_LD && (!TARGET_FLOAT128_HW - || !FLOAT128_IEEE_P (TFmode))) - continue; if (e == ENB_DFP && !TARGET_DFP) continue; if (e == ENB_CRYPTO && !TARGET_CRYPTO) @@ -3396,8 +3387,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */, || (e == ENB_P9_64 && TARGET_MODULO && TARGET_POWERPC64) || (e == ENB_P9V && TARGET_P9_VECTOR) || (e == ENB_IEEE128_HW && TARGET_FLOAT128_HW) - || (e == ENB_IEEE128_HW_LD && TARGET_FLOAT128_HW - && FLOAT128_IEEE_P (TFmode)) || (e == ENB_DFP && TARGET_DFP) || (e == ENB_CRYPTO && TARGET_CRYPTO) || (e == ENB_HTM && TARGET_HTM) @@ -3437,13 +3426,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */, return const0_rtx; } - if (bif_is_ieeeld (*bifaddr) && !FLOAT128_IEEE_P (TFmode)) - { - error ("%qs requires % to be IEEE 128-bit format", - bifaddr->bifname); - return const0_rtx; - } - if (bif_is_cpu (*bifaddr)) return cpu_expand_builtin (fcode, exp, target); diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index 84cf2effd25..f76f54793d7 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -139,7 +139,6 @@ ; endian Needs special handling for endianness ; ibmld Restrict usage to the case when TFmode is IBM-128 ; ibm128 Restrict usage to the case where __ibm128 is supported or if ibmld -; ieeeld Restrict usage to the case when TFmode is IEEE-128 ; ; Each attribute corresponds to extra processing required when ; the built-in is expanded. All such special processing should @@ -2867,56 +2866,54 @@ ; Builtins requiring hardware support for IEEE-128 floating-point. [ieee128-hw] - fpmath _Float128 __builtin_addf128_round_to_odd_kf (_Float128, _Float128); - ADDF128_ODD_KF addkf3_odd {} + fpmath _Float128 __builtin_addf128_round_to_odd (_Float128, _Float128); + ADDF128_ODD addkf3_odd {} - fpmath _Float128 __builtin_divf128_round_to_odd_kf (_Float128, _Float128); - DIVF128_ODD_KF divkf3_odd {} + fpmath _Float128 __builtin_divf128_round_to_odd (_Float128, _Float128); + DIVF128_ODD divkf3_odd {} - fpmath _Float128 __builtin_fmaf128_round_to_odd_kf (_Float128, _Float128, \ - _Float128); - FMAF128_ODD_KF fmakf4_odd {} + fpmath _Float128 __builtin_fmaf128_round_to_odd (_Float128, _Float128, \ + _Float128); + FMAF128_ODD fmakf4_odd {} - fpmath _Float128 __builtin_mulf128_round_to_odd_kf (_Float128, _Float128); - MULF128_ODD_KF mulkf3_odd {} + fpmath _Float128 __builtin_mulf128_round_to_odd (_Float128, _Float128); + MULF128_ODD mulkf3_odd {} - const signed int __builtin_vsx_scalar_cmp_exp_qp_eq_kf (_Float128, _Float128); - VSCEQPEQ_KF xscmpexpqp_eq_kf {} + const signed int __builtin_vsx_scalar_cmp_exp_qp_eq (_Float128, _Float128); + VSCEQPEQ xscmpexpqp_eq_kf {} - const signed int __builtin_vsx_scalar_cmp_exp_qp_gt_kf (_Float128, _Float128); - VSCEQPGT_KF xscmpexpqp_gt_kf {} + const signed int __builtin_vsx_scalar_cmp_exp_qp_gt (_Float128, _Float128); + VSCEQPGT xscmpexpqp_gt_kf {} - const signed int __builtin_vsx_scalar_cmp_exp_qp_lt_kf (_Float128, _Float128); - VSCEQPLT_KF xscmpexpqp_lt_kf {} + const signed int __builtin_vsx_scalar_cmp_exp_qp_lt (_Float128, _Float128); + VSCEQPLT xscmpexpqp_lt_kf {} const signed int \ - __builtin_vsx_scalar_cmp_exp_qp_unordered_kf (_Float128, _Float128); - VSCEQPUO_KF xscmpexpqp_unordered_kf {} + __builtin_vsx_scalar_cmp_exp_qp_unordered (_Float128, _Float128); + VSCEQPUO xscmpexpqp_unordered_kf {} - fpmath _Float128 __builtin_sqrtf128_round_to_odd_kf (_Float128); - SQRTF128_ODD_KF sqrtkf2_odd {} + fpmath _Float128 __builtin_sqrtf128_round_to_odd (_Float128); + SQRTF128_ODD sqrtkf2_odd {} - fpmath _Float128 __builtin_subf128_round_to_odd_kf (_Float128, _Float128); - SUBF128_ODD_KF subkf3_odd {} + fpmath _Float128 __builtin_subf128_round_to_odd (_Float128, _Float128); + SUBF128_ODD subkf3_odd {} - fpmath double __builtin_truncf128_round_to_odd_kf (_Float128); - TRUNCF128_ODD_KF trunckfdf2_odd {} + fpmath double __builtin_truncf128_round_to_odd (_Float128); + TRUNCF128_ODD trunckfdf2_odd {} - const signed long long __builtin_vsx_scalar_extract_expq_kf (_Float128); - VSEEQP_KF xsxexpqp_kf {} + const signed long long __builtin_vsx_scalar_extract_expq (_Float128); + VSEEQP xsxexpqp_kf {} - const signed __int128 __builtin_vsx_scalar_extract_sigq_kf (_Float128); - VSESQP_KF xsxsigqp_kf {} + const signed __int128 __builtin_vsx_scalar_extract_sigq (_Float128); + VSESQP xsxsigqp_kf {} -; Note we cannot overload this function since it does not have KFmode -; or TFmode arguments. const _Float128 __builtin_vsx_scalar_insert_exp_q (unsigned __int128, \ unsigned long long); VSIEQP xsiexpqp_kf {} - const _Float128 __builtin_vsx_scalar_insert_exp_qp_kf (_Float128, \ - unsigned long long); - VSIEQPF_KF xsiexpqpf_kf {} + const _Float128 __builtin_vsx_scalar_insert_exp_qp (_Float128, \ + unsigned long long); + VSIEQPF xsiexpqpf_kf {} const signed int __builtin_vsx_scalar_test_data_class_qp (_Float128, \ const int<7>); @@ -2926,60 +2923,6 @@ VSTDCNQP xststdcnegqp_kf {} -; Builtins requiring hardware support for IEEE-128 floating-point. Long double -; must use the IEEE 128-bit encoding. -[ieee128-hw-ld] - fpmath long double __builtin_addf128_round_to_odd_tf (long double, long double); - ADDF128_ODD_TF addtf3_odd {ieeeld} - - fpmath long double __builtin_divf128_round_to_odd_tf (long double,long double); - DIVF128_ODD_TF divtf3_odd {ieeeld} - - fpmath long double __builtin_fmaf128_round_to_odd_tf (long double, \ - long double, \ - long double); - FMAF128_ODD_TF fmatf4_odd {ieeeld} - - fpmath long double __builtin_mulf128_round_to_odd_tf (long double, \ - long double); - MULF128_ODD_TF multf3_odd {ieeeld} - - const signed int __builtin_vsx_scalar_cmp_exp_qp_eq_tf (long double, \ - long double); - VSCEQPEQ_TF xscmpexpqp_eq_tf {ieeeld} - - const signed int __builtin_vsx_scalar_cmp_exp_qp_gt_tf (long double, \ - long double); - VSCEQPGT_TF xscmpexpqp_gt_kf {ieeeld} - - const signed int __builtin_vsx_scalar_cmp_exp_qp_lt_tf (long double, \ - long double); - VSCEQPLT_TF xscmpexpqp_lt_tf {ieeeld} - - const signed int \ - __builtin_vsx_scalar_cmp_exp_qp_unordered_tf (_Float128, _Float128); - VSCEQPUO_TF xscmpexpqp_unordered_tf {ieeeld} - - fpmath long double __builtin_sqrtf128_round_to_odd_tf (long double); - SQRTF128_ODD_TF sqrttf2_odd {ieeeld} - - fpmath long double __builtin_subf128_round_to_odd_tf (long double, \ - long double); - SUBF128_ODD_TF subtf3_odd {ieeeld} - - fpmath double __builtin_truncf128_round_to_odd_tf (long double); - TRUNCF128_ODD_TF trunctfdf2_odd {ieeeld} - - const signed long long __builtin_vsx_scalar_extract_expq_tf (long double); - VSEEQP_TF xsxexpqp_tf {ieeeld} - - const signed __int128 __builtin_vsx_scalar_extract_sigq_tf (long double); - VSESQP_TF xsxsigqp_tf {ieeeld} - - const long double __builtin_vsx_scalar_insert_exp_qp_tf (_Float128, \ - unsigned long long); - VSIEQPF_TF xsiexpqpf_tf {ieeeld} - ; Decimal floating-point builtins. [dfp] diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc index 4532cb4624b..0d13645040f 100644 --- a/gcc/config/rs6000/rs6000-c.cc +++ b/gcc/config/rs6000/rs6000-c.cc @@ -1935,13 +1935,11 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl, 128-bit variant of built-in function. */ if (GET_MODE_PRECISION (arg1_mode) > 64) { - /* If first argument is of float variety, choose variant that - expects _Float128 argument (or long double if long doubles are - IEEE 128-bit). Otherwise, expect __int128 argument. */ + /* If first argument is of float variety, choose variant + that expects __ieee128 argument. Otherwise, expect + __int128 argument. */ if (GET_MODE_CLASS (arg1_mode) == MODE_FLOAT) - instance_code = ((arg1_mode == TFmode) - ? RS6000_BIF_VSIEQPF_TF - : RS6000_BIF_VSIEQPF_KF); + instance_code = RS6000_BIF_VSIEQPF; else instance_code = RS6000_BIF_VSIEQP; } diff --git a/gcc/config/rs6000/rs6000-gen-builtins.cc b/gcc/config/rs6000/rs6000-gen-builtins.cc index b939e04c258..0bd7a535e5f 100644 --- a/gcc/config/rs6000/rs6000-gen-builtins.cc +++ b/gcc/config/rs6000/rs6000-gen-builtins.cc @@ -95,7 +95,6 @@ along with GCC; see the file COPYING3. If not see ibmld Restrict usage to the case when TFmode is IBM-128 ibm128 Restrict usage to the case where __ibm128 is supported or if ibmld - ieeeld Restrict usage to the case when TFmode is IEEE-128 An example stanza might look like this: @@ -228,7 +227,6 @@ enum bif_stanza BSTZ_P9_64, BSTZ_P9V, BSTZ_IEEE128_HW, - BSTZ_IEEE128_HW_LD, BSTZ_DFP, BSTZ_CRYPTO, BSTZ_HTM, @@ -263,7 +261,6 @@ static stanza_entry stanza_map[NUMBIFSTANZAS] = { "power9-64", BSTZ_P9_64 }, { "power9-vector", BSTZ_P9V }, { "ieee128-hw", BSTZ_IEEE128_HW }, - { "ieee128-hw-ld", BSTZ_IEEE128_HW_LD }, { "dfp", BSTZ_DFP }, { "crypto", BSTZ_CRYPTO }, { "htm", BSTZ_HTM }, @@ -289,7 +286,6 @@ static const char *enable_string[NUMBIFSTANZAS] = "ENB_P9_64", "ENB_P9V", "ENB_IEEE128_HW", - "ENB_IEEE128_HW_LD", "ENB_DFP", "ENB_CRYPTO", "ENB_HTM", @@ -399,7 +395,6 @@ struct attrinfo bool isendian; bool isibmld; bool isibm128; - bool isieeeld; }; /* Fields associated with a function prototype (bif or overload). */ @@ -1449,8 +1444,6 @@ parse_bif_attrs (attrinfo *attrptr) attrptr->isibmld = 1; else if (!strcmp (attrname, "ibm128")) attrptr->isibm128 = 1; - else if (!strcmp (attrname, "ieeeld")) - attrptr->isieeeld = 1; else { diag (oldpos, "unknown attribute.\n"); @@ -1484,8 +1477,7 @@ parse_bif_attrs (attrinfo *attrptr) "ldvec = %d, stvec = %d, reve = %d, pred = %d, htm = %d, " "htmspr = %d, htmcr = %d, mma = %d, quad = %d, pair = %d, " "mmaint = %d, no32bit = %d, 32bit = %d, cpu = %d, ldstmask = %d, " - "lxvrse = %d, lxvrze = %d, endian = %d, ibmdld = %d, ibm128 = %d, " - "ieeeld = %d.\n", + "lxvrse = %d, lxvrze = %d, endian = %d, ibmdld = %d, ibm128 = %d.\n", attrptr->isinit, attrptr->isset, attrptr->isextract, attrptr->isnosoft, attrptr->isldvec, attrptr->isstvec, attrptr->isreve, attrptr->ispred, attrptr->ishtm, attrptr->ishtmspr, @@ -1493,7 +1485,7 @@ parse_bif_attrs (attrinfo *attrptr) attrptr->ismmaint, attrptr->isno32bit, attrptr->is32bit, attrptr->iscpu, attrptr->isldstmask, attrptr->islxvrse, attrptr->islxvrze, attrptr->isendian, attrptr->isibmld, - attrptr->isibm128, attrptr->isieeeld); + attrptr->isibm128); #endif return PC_OK; @@ -2260,7 +2252,6 @@ write_decls (void) fprintf (header_file, " ENB_P9_64,\n"); fprintf (header_file, " ENB_P9V,\n"); fprintf (header_file, " ENB_IEEE128_HW,\n"); - fprintf (header_file, " ENB_IEEE128_HW_LD,\n"); fprintf (header_file, " ENB_DFP,\n"); fprintf (header_file, " ENB_CRYPTO,\n"); fprintf (header_file, " ENB_HTM,\n"); @@ -2310,7 +2301,6 @@ write_decls (void) fprintf (header_file, "#define bif_endian_bit\t\t(0x00200000)\n"); fprintf (header_file, "#define bif_ibmld_bit\t\t(0x00400000)\n"); fprintf (header_file, "#define bif_ibm128_bit\t\t(0x00800000)\n"); - fprintf (header_file, "#define bif_ieeeld_bit\t\t(0x01000000)\n"); fprintf (header_file, "\n"); fprintf (header_file, "#define bif_is_init(x)\t\t((x).bifattrs & bif_init_bit)\n"); @@ -2360,8 +2350,6 @@ write_decls (void) "#define bif_is_ibmld(x)\t((x).bifattrs & bif_ibmld_bit)\n"); fprintf (header_file, "#define bif_is_ibm128(x)\t((x).bifattrs & bif_ibm128_bit)\n"); - fprintf (header_file, - "#define bif_is_ieeeld(x)\t((x).bifattrs & bif_ieeeld_bit)\n"); fprintf (header_file, "\n"); fprintf (header_file, @@ -2560,8 +2548,6 @@ write_bif_static_init (void) fprintf (init_file, " | bif_ibmld_bit"); if (bifp->attrs.isibm128) fprintf (init_file, " | bif_ibm128_bit"); - if (bifp->attrs.isieeeld) - fprintf (init_file, " | bif_ieeeld_bit"); fprintf (init_file, ",\n"); fprintf (init_file, " /* restr_opnd */\t{%d, %d, %d},\n", bifp->proto.restr_opnd[0], bifp->proto.restr_opnd[1], diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def index 546883ece19..44e2945aaa0 100644 --- a/gcc/config/rs6000/rs6000-overload.def +++ b/gcc/config/rs6000/rs6000-overload.def @@ -4474,49 +4474,37 @@ signed int __builtin_vec_scalar_cmp_exp_eq (double, double); VSCEDPEQ signed int __builtin_vec_scalar_cmp_exp_eq (_Float128, _Float128); - VSCEQPEQ_KF - signed int __builtin_vec_scalar_cmp_exp_eq (long double, long double); - VSCEQPEQ_TF + VSCEQPEQ [VEC_VSCEGT, scalar_cmp_exp_gt, __builtin_vec_scalar_cmp_exp_gt] signed int __builtin_vec_scalar_cmp_exp_gt (double, double); VSCEDPGT signed int __builtin_vec_scalar_cmp_exp_gt (_Float128, _Float128); - VSCEQPGT_KF - signed int __builtin_vec_scalar_cmp_exp_gt (long double, long double); - VSCEQPGT_TF + VSCEQPGT [VEC_VSCELT, scalar_cmp_exp_lt, __builtin_vec_scalar_cmp_exp_lt] signed int __builtin_vec_scalar_cmp_exp_lt (double, double); VSCEDPLT signed int __builtin_vec_scalar_cmp_exp_lt (_Float128, _Float128); - VSCEQPLT_KF - signed int __builtin_vec_scalar_cmp_exp_lt (long double, long double); - VSCEQPLT_TF + VSCEQPLT [VEC_VSCEUO, scalar_cmp_exp_unordered, __builtin_vec_scalar_cmp_exp_unordered] signed int __builtin_vec_scalar_cmp_exp_unordered (double, double); VSCEDPUO signed int __builtin_vec_scalar_cmp_exp_unordered (_Float128, _Float128); - VSCEQPUO_KF - signed int __builtin_vec_scalar_cmp_exp_unordered (long double, long double); - VSCEQPUO_TF + VSCEQPUO [VEC_VSEE, scalar_extract_exp, __builtin_vec_scalar_extract_exp] unsigned int __builtin_vec_scalar_extract_exp (double); VSEEDP unsigned int __builtin_vec_scalar_extract_exp (_Float128); - VSEEQP_KF - unsigned int __builtin_vec_scalar_extract_exp (long double); - VSEEQP_TF + VSEEQP [VEC_VSES, scalar_extract_sig, __builtin_vec_scalar_extract_sig] unsigned long long __builtin_vec_scalar_extract_sig (double); VSESDP unsigned __int128 __builtin_vec_scalar_extract_sig (_Float128); - VSESQP_KF - unsigned __int128 __builtin_vec_scalar_extract_sig (long double); - VSESQP_TF + VSESQP [VEC_VSIE, scalar_insert_exp, __builtin_vec_scalar_insert_exp] double __builtin_vec_scalar_insert_exp (unsigned long long, unsigned long long); @@ -4526,9 +4514,7 @@ _Float128 __builtin_vec_scalar_insert_exp (unsigned __int128, unsigned long long); VSIEQP _Float128 __builtin_vec_scalar_insert_exp (_Float128, unsigned long long); - VSIEQPF_KF - long double __builtin_vec_scalar_insert_exp (long double, unsigned long long); - VSIEQPF_TF + VSIEQPF [VEC_VSTDC, scalar_test_data_class, __builtin_vec_scalar_test_data_class] unsigned int __builtin_vec_scalar_test_data_class (float, const int); @@ -6189,47 +6175,3 @@ VUPKLSW VUPKLSW_DEPR1 vbll __builtin_vec_vupklsw (vbi); VUPKLSW VUPKLSW_DEPR2 - -[ADDF128_ODD, SKIP, __builtin_addf128_round_to_odd] - long double __builtin_addf128_round_to_odd (long double, long double); - ADDF128_ODD_TF - _Float128 __builtin_addf128_round_to_odd (_Float128, _Float128); - ADDF128_ODD_KF - -[DIVF128_ODD, SKIP, __builtin_divf128_round_to_odd] - long double __builtin_divf128_round_to_odd (long double, long double); - DIVF128_ODD_TF - _Float128 __builtin_divf128_round_to_odd (_Float128, _Float128); - DIVF128_ODD_KF - -[FMAF128_ODD, SKIP, __builtin_fmaf128_round_to_odd] - long double __builtin_fmaf128_round_to_odd (long double, long double, \ - long double); - FMAF128_ODD_TF - _Float128 __builtin_fmaf128_round_to_odd (_Float128, _Float128, \ - _Float128); - FMAF128_ODD_KF - -[MULF128_ODD, SKIP, __builtin_mulf128_round_to_odd] - long double __builtin_mulf128_round_to_odd (long double, long double); - MULF128_ODD_TF - _Float128 __builtin_mulf128_round_to_odd (_Float128, _Float128); - MULF128_ODD_KF - -[SQRTF128_ODD, SKIP, __builtin_sqrtf128_round_to_odd] - long double __builtin_sqrtf128_round_to_odd (long double); - SQRTF128_ODD_TF - _Float128 __builtin_sqrtf128_round_to_odd (_Float128); - SQRTF128_ODD_KF - -[SUBF128_ODD, SKIP, __builtin_subf128_round_to_odd] - long double __builtin_subf128_round_to_odd (long double, long double); - SUBF128_ODD_TF - _Float128 __builtin_subf128_round_to_odd (_Float128, _Float128); - SUBF128_ODD_KF - -[TRUNCF128_ODD, SKIP, __builtin_truncf128_round_to_odd] - long double __builtin_truncf128_round_to_odd (long double); - TRUNCF128_ODD_TF - _Float128 __builtin_truncf128_round_to_odd (_Float128); - TRUNCF128_ODD_KF diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c index 14c6554f417..850ff620490 100644 --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c @@ -11,7 +11,7 @@ get_exponent (__ieee128 *p) { __ieee128 source = *p; - return __builtin_vec_scalar_extract_exp (source); /* { dg-error "'__builtin_vsx_scalar_extract_expq.*' requires" } */ + return __builtin_vec_scalar_extract_exp (source); /* { dg-error "'__builtin_vsx_scalar_extract_expq' requires" } */ } diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c index 9800cf65017..32a53c6fffd 100644 --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c @@ -11,5 +11,5 @@ get_significand (__ieee128 *p) { __ieee128 source = *p; - return __builtin_vec_scalar_extract_sig (source); /* { dg-error "'__builtin_vsx_scalar_extract_sigq.*' requires" } */ + return __builtin_vec_scalar_extract_sig (source); /* { dg-error "'__builtin_vsx_scalar_extract_sigq' requires" } */ } diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c index 4018c8fa08a..769d3b0546a 100644 --- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c +++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c @@ -13,5 +13,5 @@ insert_exponent (__ieee128 *significand_p, __ieee128 significand = *significand_p; unsigned long long int exponent = *exponent_p; - return __builtin_vec_scalar_insert_exp (significand, exponent); /* { dg-error "'__builtin_vsx_scalar_insert_exp_qp.*' requires" } */ + return __builtin_vec_scalar_insert_exp (significand, exponent); /* { dg-error "'__builtin_vsx_scalar_insert_exp_qp' requires" } */ }