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From: Michael Meissner <meissner@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work095)] Make -mblock-ops-vector-pair option valid as an ISA option. Date: Thu, 21 Jul 2022 21:47:53 +0000 (GMT) [thread overview] Message-ID: <20220721214753.0BA243835839@sourceware.org> (raw) https://gcc.gnu.org/g:470d2ec504ae0ea968d6491a12298e800de91adb commit 470d2ec504ae0ea968d6491a12298e800de91adb Author: Michael Meissner <meissner@linux.ibm.com> Date: Thu Jul 21 17:46:51 2022 -0400 Make -mblock-ops-vector-pair option valid as an ISA option. I needed to turn off using load vector pair and store vector pair instructions on the power10 for performance reasons. It is likely that in future machines, we will want to enable these instructions for block moves and copies. This patch adds the -mblock-ops-vector-pair option mask to POWERPC_MASKS so that it is automatically set and cleared as we change the target cpu. 2022-07-21 Michael Meissner <meissner@linux.ibm.com> gcc/ * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_BLOCK_OPS_VECTOR_PAIR. * config/rs6000/rs6000.opt (-mblock-ops-vector-pair): Add a comment. Diff: --- gcc/config/rs6000/rs6000-cpus.def | 1 + gcc/config/rs6000/rs6000.opt | 2 ++ 2 files changed, 3 insertions(+) diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index c3825bcccd8..6ac6c526342 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -122,6 +122,7 @@ /* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */ #define POWERPC_MASKS (OPTION_MASK_ALTIVEC \ + | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \ | OPTION_MASK_CMPB \ | OPTION_MASK_CRYPTO \ | OPTION_MASK_DFP \ diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index 4931d781c4e..39d6925b8f2 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -324,6 +324,8 @@ mblock-ops-unaligned-vsx Target Mask(BLOCK_OPS_UNALIGNED_VSX) Var(rs6000_isa_flags) Generate unaligned VSX load/store for inline expansion of memcpy/memmove. +; Not set on power10 by default due to performance reasons, but it could be set +; in future processors. mblock-ops-vector-pair Target Undocumented Mask(BLOCK_OPS_VECTOR_PAIR) Var(rs6000_isa_flags) Generate unaligned VSX vector pair load/store for inline expansion of memcpy/memmove.
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