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From: Michael Meissner <meissner@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner. Date: Thu, 21 Jul 2022 21:50:08 +0000 (GMT) [thread overview] Message-ID: <20220721215008.9A1A13835839@sourceware.org> (raw) https://gcc.gnu.org/g:7ebd59ea32f840ded6022bb0acefe6dbb381b674 commit 7ebd59ea32f840ded6022bb0acefe6dbb381b674 Author: Michael Meissner <meissner@linux.ibm.com> Date: Thu Jul 21 17:49:05 2022 -0400 Update ChangeLog.meissner. 2022-07-21 Michael Meissner <meissner@linux.ibm.com> gcc/ * ChangeLog.meissner: Update. Diff: --- gcc/ChangeLog.meissner | 39 +++++++++++++++++++++------------------ 1 file changed, 21 insertions(+), 18 deletions(-) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index e8ee95fdc9e..d36ddebdef0 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,23 @@ +==================== work095, patch #3. + +Make -mblock-ops-vector-pair option valid as an ISA option. + +I needed to turn off using load vector pair and store vector pair +instructions on the power10 for performance reasons. It is likely that in +future machines, we will want to enable these instructions for block moves +and copies. This patch adds the -mblock-ops-vector-pair option mask to +POWERPC_MASKS so that it is automatically set and cleared as we change the +target cpu. + +2022-07-19 Michael Meissner <meissner@linux.ibm.com> + +gcc/ + + * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add + OPTION_MASK_BLOCK_OPS_VECTOR_PAIR. + * config/rs6000/rs6000.opt (-mblock-ops-vector-pair): Add a + comment. + ==================== work095, patch #2. Remove setting -mblock-ops-vector-pair on power10. @@ -15,24 +35,7 @@ gcc/ Remove code setting -mblock-ops-vector-pair by default on power10. -==================== work095, patch #2. - -Make BLOCK_OPTS options settable with ISA flags. - -In wanting to turn off block moves from generating load and store vector -pair operations on the power10, I noticed that the options for controlling -the code block moves generate (OPTION_MASK_BLOCK_OPS_UNALIGNED_VSX and -OPTION_MASK_BLOCK_OPS_VECTOR_PAIR) were not set in POWERPC_MASKS. It is -possible in future CPUs we might want to enable these options -automatically. This code moves these options to POWERPC_MASKS. - -2022-07-18 Michael Meissner <meissner@linux.ibm.com> - -gcc/ - - * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add - OPTION_MASK_BLOCK_OPS_VECTOR_PAIR and - OPTION_MASK_BLOCK_OPS_UNALIGNED_VSX. +==================== work095, patch #1 (reverted) ==================== work095, branch setup.
next reply other threads:[~2022-07-21 21:50 UTC|newest] Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-07-21 21:50 Michael Meissner [this message] -- strict thread matches above, loose matches on Subject: below -- 2022-07-30 2:18 Michael Meissner 2022-07-30 1:34 Michael Meissner 2022-07-30 1:30 Michael Meissner 2022-07-29 19:30 Michael Meissner 2022-07-29 17:57 Michael Meissner 2022-07-29 5:58 Michael Meissner 2022-07-29 1:57 Michael Meissner 2022-07-29 1:47 Michael Meissner 2022-07-28 22:58 Michael Meissner 2022-07-28 22:31 Michael Meissner 2022-07-28 20:59 Michael Meissner 2022-07-23 0:12 Michael Meissner 2022-07-22 18:57 Michael Meissner 2022-07-18 19:41 Michael Meissner
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