public inbox for gcc-cvs@sourceware.org
help / color / mirror / Atom feed
From: Will Schmidt <willschm@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r13-1789] [PATCH, rs6000] Cleanup some vstrir define_expand naming inconsistencies
Date: Fri, 22 Jul 2022 00:46:02 +0000 (GMT) [thread overview]
Message-ID: <20220722004602.993383835680@sourceware.org> (raw)
https://gcc.gnu.org/g:45e0683d99cf5396b2e8232c3986767cfbb0dd34
commit r13-1789-g45e0683d99cf5396b2e8232c3986767cfbb0dd34
Author: Will Schmidt <will_schmidt@vnet.ibm.com>
Date: Thu Jul 21 19:38:22 2022 -0500
[PATCH, rs6000] Cleanup some vstrir define_expand naming inconsistencies
This cleans up some of the naming around the vstrir and vstril
instruction definitions, with some cosmetic changes for consistency.
No functional changes.
Regtested just in case, no regressions.
[V2] Used 'direct' instead of 'internal', and cosmetically reworked
the changelog.
gcc/
* config/rs6000/altivec.md:
(vstrir_code_<mode>): Rename to...
(vstrir_direct_<mode>): ... this.
(vstrir_p_code_<mode>): Rename to...
(vstrir_p_direct_<mode>): ... this.
(vstril_code_<mode>): Rename to...
(vstril_direct_<mode>): ... this.
(vstril_p_code_<mode>): Rename to...
(vstril_p_direct_<mode>): ... this.
Diff:
---
gcc/config/rs6000/altivec.md | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index efc8ae35c2e..2c4940f2e21 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -886,13 +886,13 @@
"TARGET_POWER10"
{
if (BYTES_BIG_ENDIAN)
- emit_insn (gen_vstrir_code_<mode> (operands[0], operands[1]));
+ emit_insn (gen_vstrir_direct_<mode> (operands[0], operands[1]));
else
- emit_insn (gen_vstril_code_<mode> (operands[0], operands[1]));
+ emit_insn (gen_vstril_direct_<mode> (operands[0], operands[1]));
DONE;
})
-(define_insn "vstrir_code_<mode>"
+(define_insn "vstrir_direct_<mode>"
[(set (match_operand:VIshort 0 "altivec_register_operand" "=v")
(unspec:VIshort
[(match_operand:VIshort 1 "altivec_register_operand" "v")]
@@ -901,7 +901,7 @@
"vstri<wd>r %0,%1"
[(set_attr "type" "vecsimple")])
-;; This expands into same code as vstrir_<mode> followed by condition logic
+;; This expands into same code as vstrir<mode> followed by condition logic
;; so that a single vstribr. or vstrihr. or vstribl. or vstrihl. instruction
;; can, for example, satisfy the needs of a vec_strir () function paired
;; with a vec_strir_p () function if both take the same incoming arguments.
@@ -912,14 +912,14 @@
{
rtx scratch = gen_reg_rtx (<MODE>mode);
if (BYTES_BIG_ENDIAN)
- emit_insn (gen_vstrir_p_code_<mode> (scratch, operands[1]));
+ emit_insn (gen_vstrir_p_direct_<mode> (scratch, operands[1]));
else
- emit_insn (gen_vstril_p_code_<mode> (scratch, operands[1]));
+ emit_insn (gen_vstril_p_direct_<mode> (scratch, operands[1]));
emit_insn (gen_cr6_test_for_zero (operands[0]));
DONE;
})
-(define_insn "vstrir_p_code_<mode>"
+(define_insn "vstrir_p_direct_<mode>"
[(set (match_operand:VIshort 0 "altivec_register_operand" "=v")
(unspec:VIshort
[(match_operand:VIshort 1 "altivec_register_operand" "v")]
@@ -938,13 +938,13 @@
"TARGET_POWER10"
{
if (BYTES_BIG_ENDIAN)
- emit_insn (gen_vstril_code_<mode> (operands[0], operands[1]));
+ emit_insn (gen_vstril_direct_<mode> (operands[0], operands[1]));
else
- emit_insn (gen_vstrir_code_<mode> (operands[0], operands[1]));
+ emit_insn (gen_vstrir_direct_<mode> (operands[0], operands[1]));
DONE;
})
-(define_insn "vstril_code_<mode>"
+(define_insn "vstril_direct_<mode>"
[(set (match_operand:VIshort 0 "altivec_register_operand" "=v")
(unspec:VIshort
[(match_operand:VIshort 1 "altivec_register_operand" "v")]
@@ -964,14 +964,14 @@
{
rtx scratch = gen_reg_rtx (<MODE>mode);
if (BYTES_BIG_ENDIAN)
- emit_insn (gen_vstril_p_code_<mode> (scratch, operands[1]));
+ emit_insn (gen_vstril_p_direct_<mode> (scratch, operands[1]));
else
- emit_insn (gen_vstrir_p_code_<mode> (scratch, operands[1]));
+ emit_insn (gen_vstrir_p_direct_<mode> (scratch, operands[1]));
emit_insn (gen_cr6_test_for_zero (operands[0]));
DONE;
})
-(define_insn "vstril_p_code_<mode>"
+(define_insn "vstril_p_direct_<mode>"
[(set (match_operand:VIshort 0 "altivec_register_operand" "=v")
(unspec:VIshort
[(match_operand:VIshort 1 "altivec_register_operand" "v")]
reply other threads:[~2022-07-22 0:46 UTC|newest]
Thread overview: [no followups] expand[flat|nested] mbox.gz Atom feed
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220722004602.993383835680@sourceware.org \
--to=willschm@gcc.gnu.org \
--cc=gcc-cvs@gcc.gnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).