From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 7B7693858405; Fri, 22 Jul 2022 18:57:18 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7B7693858405 Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work095)] Update ChangeLog.meissner. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work095 X-Git-Oldrev: ee2f3cd73a71411b13e0f52acde94917e90718c5 X-Git-Newrev: 764ddb919d8ccdb6a01d9bbacaea15508f8d0187 Message-Id: <20220722185718.7B7693858405@sourceware.org> Date: Fri, 22 Jul 2022 18:57:18 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 22 Jul 2022 18:57:18 -0000 https://gcc.gnu.org/g:764ddb919d8ccdb6a01d9bbacaea15508f8d0187 commit 764ddb919d8ccdb6a01d9bbacaea15508f8d0187 Author: Michael Meissner Date: Fri Jul 22 14:57:00 2022 -0400 Update ChangeLog.meissner. 2022-07-22 Michael Meissner gcc/ * ChangeLog.meissner: Update. Diff: --- gcc/ChangeLog.meissner | 62 +++++++++++++++++++++----------------------------- 1 file changed, 26 insertions(+), 36 deletions(-) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index 61d24a87eae..bd2990bce93 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,26 @@ +==================== work095, patch #9. + +Do not enable -mblock-ops-vector-pair. + +Testing has shown that using the load vector pair and store vector pair +instructions for block moves has some performance issues on power10. + +A patch on June 11th modified the code so that GCC would not set +-mblock-ops-vector-pair by default if we are tuning for power10, but it +would set the option if we were tuning for a different machine and have +load and store vector pair instructions enabled. + +This patch just eliminates the code setting -mblock-ops-vector-pair at +all. + + +2022-07-22 Michael Meissner + +gcc/ + + * config/rs6000/rs6000.cc (rs6000_option_override_internal): + Do not enable -mblock-ops-vector-pair by default on power10. + ==================== work095, patch #8. Support IEEE 128-bit overload test data built-in functions. @@ -168,44 +191,11 @@ gcc/ attribute. (write_bif_static_init): Add support for ieeeld attribute. -==================== work095, patch #3. - -Make -mblock-ops-vector-pair option valid as an ISA option. - -I needed to turn off using load vector pair and store vector pair -instructions on the power10 for performance reasons. It is likely that in -future machines, we will want to enable these instructions for block moves -and copies. This patch adds the -mblock-ops-vector-pair option mask to -POWERPC_MASKS so that it is automatically set and cleared as we change the -target cpu. +==================== work095, patch #3 was reverted. -2022-07-19 Michael Meissner - -gcc/ - - * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add - OPTION_MASK_BLOCK_OPS_VECTOR_PAIR. - * config/rs6000/rs6000.opt (-mblock-ops-vector-pair): Add a - comment. - -==================== work095, patch #2. - -Remove setting -mblock-ops-vector-pair on power10. - -Testing has shown that using the load vector pair and store vector pair -instructions for block moves has some performance issues on power10. This -patch does not set this option by default. If it is a win in other -machines, this flag can be set in the ISA options. - -2022-07-18 Michael Meissner - -gcc/ - - * config/rs6000/rs6000.cc (rs6000_option_override_internal): - Remove code setting -mblock-ops-vector-pair by default on - power10. +==================== work095, patch #2 was reverted. -==================== work095, patch #1 (reverted) +==================== work095, patch #1 was reverted. ==================== work095, branch setup.