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From: Michael Meissner <meissner@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work095)] Revert patch. Date: Fri, 29 Jul 2022 01:49:26 +0000 (GMT) [thread overview] Message-ID: <20220729014926.45502385840A@sourceware.org> (raw) https://gcc.gnu.org/g:411a768e46e3efb126748d388b5e4beb1ac1713f commit 411a768e46e3efb126748d388b5e4beb1ac1713f Author: Michael Meissner <meissner@linux.ibm.com> Date: Thu Jul 28 21:48:55 2022 -0400 Revert patch. 2022-07-28 Michael Meissner <meissner@linux.ibm.com> gcc/ Revert patch. * config/rs6000/rs600.cc (init_float128_ibm): Remove checks for hardware floating point for the IBM 128-bit comparisons. (rs6000_init_libfuncs): Create IBM 128-bit floating point support even if we don't support IEEE 128-bit floating point. (rs6000_scalar_mode_supported_p): Allow __ibm128 even if we don't support _Float128. * config/rs6000/rs6000.h (FLOAT128_IBM_P): Remove checks for -mhard-float. (TARGET_IBM128): New macro. * config/rs6000/rs6000.md (@extenddf<mode>2_fprs): Allow IFmode to be converted even if long double is not 128-bits. (extenddf<mode>2_vsx): Likewise. (extendtfif2): Allow conversion if we have __ibm128 but not IEEE 128-bit floating point. (trunckftf2): Likewise. Diff: --- gcc/config/rs6000/rs6000.cc | 50 ++++++++++++++++++++++----------------------- gcc/config/rs6000/rs6000.h | 8 +------- gcc/config/rs6000/rs6000.md | 13 ++++++------ 3 files changed, 33 insertions(+), 38 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 94f84e26f7a..ae61505123d 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -10980,23 +10980,26 @@ init_float128_ibm (machine_mode mode) set_optab_libfunc (smul_optab, mode, "__gcc_qmul"); set_optab_libfunc (sdiv_optab, mode, "__gcc_qdiv"); - set_optab_libfunc (neg_optab, mode, "__gcc_qneg"); - set_optab_libfunc (eq_optab, mode, "__gcc_qeq"); - set_optab_libfunc (ne_optab, mode, "__gcc_qne"); - set_optab_libfunc (gt_optab, mode, "__gcc_qgt"); - set_optab_libfunc (ge_optab, mode, "__gcc_qge"); - set_optab_libfunc (lt_optab, mode, "__gcc_qlt"); - set_optab_libfunc (le_optab, mode, "__gcc_qle"); - set_optab_libfunc (unord_optab, mode, "__gcc_qunord"); - - set_conv_libfunc (sext_optab, mode, SFmode, "__gcc_stoq"); - set_conv_libfunc (sext_optab, mode, DFmode, "__gcc_dtoq"); - set_conv_libfunc (trunc_optab, SFmode, mode, "__gcc_qtos"); - set_conv_libfunc (trunc_optab, DFmode, mode, "__gcc_qtod"); - set_conv_libfunc (sfix_optab, SImode, mode, "__gcc_qtoi"); - set_conv_libfunc (ufix_optab, SImode, mode, "__gcc_qtou"); - set_conv_libfunc (sfloat_optab, mode, SImode, "__gcc_itoq"); - set_conv_libfunc (ufloat_optab, mode, SImode, "__gcc_utoq"); + if (!TARGET_HARD_FLOAT) + { + set_optab_libfunc (neg_optab, mode, "__gcc_qneg"); + set_optab_libfunc (eq_optab, mode, "__gcc_qeq"); + set_optab_libfunc (ne_optab, mode, "__gcc_qne"); + set_optab_libfunc (gt_optab, mode, "__gcc_qgt"); + set_optab_libfunc (ge_optab, mode, "__gcc_qge"); + set_optab_libfunc (lt_optab, mode, "__gcc_qlt"); + set_optab_libfunc (le_optab, mode, "__gcc_qle"); + set_optab_libfunc (unord_optab, mode, "__gcc_qunord"); + + set_conv_libfunc (sext_optab, mode, SFmode, "__gcc_stoq"); + set_conv_libfunc (sext_optab, mode, DFmode, "__gcc_dtoq"); + set_conv_libfunc (trunc_optab, SFmode, mode, "__gcc_qtos"); + set_conv_libfunc (trunc_optab, DFmode, mode, "__gcc_qtod"); + set_conv_libfunc (sfix_optab, SImode, mode, "__gcc_qtoi"); + set_conv_libfunc (ufix_optab, SImode, mode, "__gcc_qtou"); + set_conv_libfunc (sfloat_optab, mode, SImode, "__gcc_itoq"); + set_conv_libfunc (ufloat_optab, mode, SImode, "__gcc_utoq"); + } } else { @@ -11179,11 +11182,10 @@ rs6000_init_libfuncs (void) { /* __float128 support. */ if (TARGET_FLOAT128_TYPE) - init_float128_ieee (KFmode); - - /* __ibm128 support. */ - if (TARGET_IBM128) - init_float128_ibm (IFmode); + { + init_float128_ibm (IFmode); + init_float128_ieee (KFmode); + } /* AIX/Darwin/64-bit Linux quad floating point routines. */ if (TARGET_LONG_DOUBLE_128) @@ -23817,9 +23819,7 @@ rs6000_scalar_mode_supported_p (scalar_mode mode) if (DECIMAL_FLOAT_MODE_P (mode)) return default_decimal_float_supported_p (); - else if (TARGET_FLOAT128_TYPE && mode == KFmode) - return true; - else if (TARGET_IBM128 && mode == IFmode) + else if (TARGET_FLOAT128_TYPE && (mode == KFmode || mode == IFmode)) return true; else return default_scalar_mode_supported_p (mode); diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 7bbd9ab5238..7d04556304a 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -334,7 +334,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); #define FLOAT128_IBM_P(MODE) \ ((!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128 \ && ((MODE) == TFmode || (MODE) == TCmode)) \ - || ((MODE) == IFmode || (MODE) == ICmode)) + || (TARGET_HARD_FLOAT && ((MODE) == IFmode || (MODE) == ICmode))) /* Helper macros to say whether a 128-bit floating point type can go in a single vector register, or whether it needs paired scalar values. */ @@ -561,12 +561,6 @@ extern int rs6000_vector_align[]; && TARGET_P8_VECTOR \ && TARGET_POWERPC64) -/* Whether the __ibm128 keyword is allowed. Any system that supports _Float128 - is assumed to be capable of supporting __ibm128. Similarly if the long - double size is 128 bits, we assume __ibm128 is supported. We don't want to - support it on a system without existing 128-bit long doubles. */ -#define TARGET_IBM128 (TARGET_FLOAT128_TYPE || TARGET_LONG_DOUBLE_128) - /* Inlining allows targets to define the meanings of bits in target_info field of ipa_fn_summary by itself, the used bits for rs6000 are listed below. */ diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index f942597c3b4..1367a2cb779 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -8586,7 +8586,8 @@ (float_extend:IBM128 (match_operand:DF 1 "nonimmediate_operand" "d,m,d"))) (use (match_operand:DF 2 "nonimmediate_operand" "m,m,d"))] - "!TARGET_VSX && TARGET_HARD_FLOAT && FLOAT128_IBM_P (<MODE>mode)" + "!TARGET_VSX && TARGET_HARD_FLOAT + && TARGET_LONG_DOUBLE_128 && FLOAT128_IBM_P (<MODE>mode)" "#" "&& reload_completed" [(set (match_dup 3) (match_dup 1)) @@ -8603,7 +8604,7 @@ [(set (match_operand:IBM128 0 "gpc_reg_operand" "=d,d") (float_extend:IBM128 (match_operand:DF 1 "nonimmediate_operand" "wa,m")))] - "TARGET_VSX && FLOAT128_IBM_P (<MODE>mode)" + "TARGET_LONG_DOUBLE_128 && TARGET_VSX && FLOAT128_IBM_P (<MODE>mode)" "#" "&& reload_completed" [(set (match_dup 2) (match_dup 1)) @@ -9060,7 +9061,7 @@ (define_expand "extendiftf2" [(set (match_operand:TF 0 "gpc_reg_operand") (float_extend:TF (match_operand:IF 1 "gpc_reg_operand")))] - "TARGET_IBM128" + "TARGET_FLOAT128_TYPE" { rs6000_expand_float128_convert (operands[0], operands[1], false); DONE; @@ -9087,7 +9088,7 @@ (define_expand "extendtfif2" [(set (match_operand:IF 0 "gpc_reg_operand") (float_extend:IF (match_operand:TF 1 "gpc_reg_operand")))] - "TARGET_IBM128" + "TARGET_FLOAT128_TYPE" { rs6000_expand_float128_convert (operands[0], operands[1], false); DONE; @@ -9096,7 +9097,7 @@ (define_expand "trunciftf2" [(set (match_operand:TF 0 "gpc_reg_operand") (float_truncate:TF (match_operand:IF 1 "gpc_reg_operand")))] - "TARGET_IBM128" + "TARGET_FLOAT128_TYPE" { rs6000_expand_float128_convert (operands[0], operands[1], false); DONE; @@ -9123,7 +9124,7 @@ (define_expand "trunctfif2" [(set (match_operand:IF 0 "gpc_reg_operand") (float_truncate:IF (match_operand:TF 1 "gpc_reg_operand")))] - "TARGET_IBM128" + "TARGET_FLOAT128_TYPE" { rs6000_expand_float128_convert (operands[0], operands[1], false); DONE;
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