From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 69912385840A; Fri, 29 Jul 2022 05:57:05 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 69912385840A Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work095)] Make __float128 and __ibm128 use different types from long double. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work095 X-Git-Oldrev: f515799a03ac3a93e8a8a8b2b5e9f896c9b22378 X-Git-Newrev: feeb0b0bb7109aa026263ea8d071ecd78e907ae0 Message-Id: <20220729055705.69912385840A@sourceware.org> Date: Fri, 29 Jul 2022 05:57:05 +0000 (GMT) X-BeenThere: gcc-cvs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-cvs mailing list List-Unsubscribe: , List-Archive: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Jul 2022 05:57:05 -0000 https://gcc.gnu.org/g:feeb0b0bb7109aa026263ea8d071ecd78e907ae0 commit feeb0b0bb7109aa026263ea8d071ecd78e907ae0 Author: Michael Meissner Date: Fri Jul 29 01:56:45 2022 -0400 Make __float128 and __ibm128 use different types from long double. 2022-07-29 Michael Meissner gcc/ * config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Always create a new tree node for __ibm128, even if long double uses the IBM 128-bit format. Always create a new tree node for __float128, even if long double uses the IEEE 128-bit format. * config/rs6000/rs600.cc (rs6000_expand_builtin): Remove code that converted the KFmode and IFmode built-in functions to TFmode depending on what the long double format is, and use built-in overloading instead. (init_float128_ieee): Remove setting up KFmode complex multiply and divide here. (rs6000_init_libfuncs): Rewrite the setup for complex multiply and divide for long double if long double uses the IEEE 128-bit encoding. (rs6000_scalar_mode_supported_p): Allow __ibm128 even if we don't support _Float128. (rs6000_libgcc_floating_mode_supported_p): Allow KFmode if IEEE 128-bit floating point is supported. Allow IFmode if either IEEE 128-bit floating point is supported or long double is IBM 128-bit. (rs6000_floatn_mode): Always return KFmode for IEEE 128-bit. Do not return TFmode, even if long double uses the IEEE 128-bit format. (rs6000_c_mode_for_suffix): The 'q' suffix always uses KFmode, even if long double uses the IEEE 128-bit encoding. * config/rs6000/rs6000.md (IFKF): Delete. (IFKF_reg): Delete. (trunckfif2): New insn. (trunctfif2): Likewise. (extendkftf2_internal): Split extendtf2_internal and extendtf2_internal into separate insns that handle either conversions between IEEE 128-bit types or between IBM 128-bit types. Set the type and insn length correctly. (extendtfkf2_internal): Likewise. (extendiftf2_internal): Likewise. (extendtfif2_internal): Likewise. gcc/testsuite/ * gcc.target/powerpc/mulkc3-2.c: Update test. * gcc.target/powerpc/divkc3-2.c: Likewise. libgcc/ * config/rs6000/float128-ifunc.c (__multc3_ieee128): Add ifunc support. (__divtc3_ieee128): Likewise. * config/rs6000/quad-float128.h (__multc3_ieee128): Add declaration. (__divtc3_ieee128): Likewise. Diff: --- gcc/config/rs6000/rs6000-builtin.cc | 111 ++-------------------------- gcc/config/rs6000/rs6000.cc | 80 +++++++++++--------- gcc/config/rs6000/rs6000.md | 94 ++++++++++++++++++----- gcc/testsuite/gcc.target/powerpc/divkc3-2.c | 2 +- gcc/testsuite/gcc.target/powerpc/mulkc3-2.c | 2 +- libgcc/config/rs6000/float128-ifunc.c | 6 ++ libgcc/config/rs6000/quad-float128.h | 5 ++ 7 files changed, 138 insertions(+), 162 deletions(-) diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc index 67e86bee781..601232148f8 100644 --- a/gcc/config/rs6000/rs6000-builtin.cc +++ b/gcc/config/rs6000/rs6000-builtin.cc @@ -719,18 +719,12 @@ rs6000_init_builtins (void) For IEEE 128-bit floating point, always create the type __ieee128. If the user used -mfloat128, rs6000-c.cc will create a define from __float128 to __ieee128. */ - if (TARGET_LONG_DOUBLE_128 && (!TARGET_IEEEQUAD || TARGET_FLOAT128_TYPE)) + if (TARGET_IBM128) { - if (!TARGET_IEEEQUAD) - ibm128_float_type_node = long_double_type_node; - else - { - ibm128_float_type_node = make_node (REAL_TYPE); - TYPE_PRECISION (ibm128_float_type_node) = 128; - SET_TYPE_MODE (ibm128_float_type_node, IFmode); - layout_type (ibm128_float_type_node); - } - t = build_qualified_type (ibm128_float_type_node, TYPE_QUAL_CONST); + ibm128_float_type_node = make_node (REAL_TYPE); + TYPE_PRECISION (ibm128_float_type_node) = 128; + SET_TYPE_MODE (ibm128_float_type_node, IFmode); + layout_type (ibm128_float_type_node); lang_hooks.types.register_builtin_type (ibm128_float_type_node, "__ibm128"); } @@ -739,11 +733,7 @@ rs6000_init_builtins (void) if (TARGET_FLOAT128_TYPE) { - if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128) - ieee128_float_type_node = long_double_type_node; - else - ieee128_float_type_node = float128_type_node; - t = build_qualified_type (ieee128_float_type_node, TYPE_QUAL_CONST); + ieee128_float_type_node = float128_type_node; lang_hooks.types.register_builtin_type (ieee128_float_type_node, "__ieee128"); } @@ -3302,79 +3292,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */, size_t uns_fcode = (size_t)fcode; enum insn_code icode = rs6000_builtin_info[uns_fcode].icode; - /* TODO: The following commentary and code is inherited from the original - builtin processing code. The commentary is a bit confusing, with the - intent being that KFmode is always IEEE-128, IFmode is always IBM - double-double, and TFmode is the current long double. The code is - confusing in that it converts from KFmode to TFmode pattern names, - when the other direction is more intuitive. Try to address this. */ - - /* We have two different modes (KFmode, TFmode) that are the IEEE - 128-bit floating point type, depending on whether long double is the - IBM extended double (KFmode) or long double is IEEE 128-bit (TFmode). - It is simpler if we only define one variant of the built-in function, - and switch the code when defining it, rather than defining two built- - ins and using the overload table in rs6000-c.cc to switch between the - two. If we don't have the proper assembler, don't do this switch - because CODE_FOR_*kf* and CODE_FOR_*tf* will be CODE_FOR_nothing. */ - if (FLOAT128_IEEE_P (TFmode)) - switch (icode) - { - case CODE_FOR_sqrtkf2_odd: - icode = CODE_FOR_sqrttf2_odd; - break; - case CODE_FOR_trunckfdf2_odd: - icode = CODE_FOR_trunctfdf2_odd; - break; - case CODE_FOR_addkf3_odd: - icode = CODE_FOR_addtf3_odd; - break; - case CODE_FOR_subkf3_odd: - icode = CODE_FOR_subtf3_odd; - break; - case CODE_FOR_mulkf3_odd: - icode = CODE_FOR_multf3_odd; - break; - case CODE_FOR_divkf3_odd: - icode = CODE_FOR_divtf3_odd; - break; - case CODE_FOR_fmakf4_odd: - icode = CODE_FOR_fmatf4_odd; - break; - case CODE_FOR_xsxexpqp_kf: - icode = CODE_FOR_xsxexpqp_tf; - break; - case CODE_FOR_xsxsigqp_kf: - icode = CODE_FOR_xsxsigqp_tf; - break; - case CODE_FOR_xststdcnegqp_kf: - icode = CODE_FOR_xststdcnegqp_tf; - break; - case CODE_FOR_xsiexpqp_kf: - icode = CODE_FOR_xsiexpqp_tf; - break; - case CODE_FOR_xsiexpqpf_kf: - icode = CODE_FOR_xsiexpqpf_tf; - break; - case CODE_FOR_xststdcqp_kf: - icode = CODE_FOR_xststdcqp_tf; - break; - case CODE_FOR_xscmpexpqp_eq_kf: - icode = CODE_FOR_xscmpexpqp_eq_tf; - break; - case CODE_FOR_xscmpexpqp_lt_kf: - icode = CODE_FOR_xscmpexpqp_lt_tf; - break; - case CODE_FOR_xscmpexpqp_gt_kf: - icode = CODE_FOR_xscmpexpqp_gt_tf; - break; - case CODE_FOR_xscmpexpqp_unordered_kf: - icode = CODE_FOR_xscmpexpqp_unordered_tf; - break; - default: - break; - } - /* In case of "#pragma target" changes, we initialize all builtins but check for actual availability now, during expand time. For invalid builtins, generate a normal call. */ @@ -3524,22 +3441,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */, gcc_unreachable (); } - if (bif_is_ibm128 (*bifaddr) && TARGET_LONG_DOUBLE_128 && !TARGET_IEEEQUAD) - { - if (fcode == RS6000_BIF_PACK_IF) - { - icode = CODE_FOR_packtf; - fcode = RS6000_BIF_PACK_TF; - uns_fcode = (size_t) fcode; - } - else if (fcode == RS6000_BIF_UNPACK_IF) - { - icode = CODE_FOR_unpacktf; - fcode = RS6000_BIF_UNPACK_TF; - uns_fcode = (size_t) fcode; - } - } - /* TRUE iff the built-in function returns void. */ bool void_func = TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node; /* Position of first argument (0 for void-returning functions, else 1). */ diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 94f84e26f7a..0099c8b95ab 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -11064,32 +11064,6 @@ init_float128_ieee (machine_mode mode) { if (FLOAT128_VECTOR_P (mode)) { - static bool complex_muldiv_init_p = false; - - /* Set up to call __mulkc3 and __divkc3 under -mabi=ieeelongdouble. If - we have clone or target attributes, this will be called a second - time. We want to create the built-in function only once. */ - if (mode == TFmode && TARGET_IEEEQUAD && !complex_muldiv_init_p) - { - complex_muldiv_init_p = true; - built_in_function fncode_mul = - (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode - - MIN_MODE_COMPLEX_FLOAT); - built_in_function fncode_div = - (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode - - MIN_MODE_COMPLEX_FLOAT); - - tree fntype = build_function_type_list (complex_long_double_type_node, - long_double_type_node, - long_double_type_node, - long_double_type_node, - long_double_type_node, - NULL_TREE); - - create_complex_muldiv ("__mulkc3", fncode_mul, fntype); - create_complex_muldiv ("__divkc3", fncode_div, fntype); - } - set_optab_libfunc (add_optab, mode, "__addkf3"); set_optab_libfunc (sub_optab, mode, "__subkf3"); set_optab_libfunc (neg_optab, mode, "__negkf2"); @@ -11195,6 +11169,46 @@ rs6000_init_libfuncs (void) else init_float128_ieee (TFmode); } + + /* Set up to call __mulkc3 and __divkc3 when long double uses the IEEE + 128-bit encoding. We cannot use the same name (__mulkc3 or __divkc3 for + both IEEE long double and for explicit _Float128/__float128) because + c_builtin_function will complain if we create two built-in functions with + the same name. Instead we use an alias name for the case when long double + uses the IEEE 128-bit encoding. Libgcc will create a weak alias reference + for this name. + + We need to only execute this once. If we have clone or target attributes, + this will be called a second time. We need to create the built-in + function only once. */ + static bool complex_muldiv_init_p = false; + + if (TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128 + && !complex_muldiv_init_p) + { + complex_muldiv_init_p = true; + + tree fntype = build_function_type_list (complex_long_double_type_node, + long_double_type_node, + long_double_type_node, + long_double_type_node, + long_double_type_node, + NULL_TREE); + + /* Create complex multiply. */ + built_in_function mul_fncode = + (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode + - MIN_MODE_COMPLEX_FLOAT); + + create_complex_muldiv ("__multc3_ieee128", mul_fncode, fntype); + + /* Create complex divide. */ + built_in_function div_fncode = + (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode + - MIN_MODE_COMPLEX_FLOAT); + + create_complex_muldiv ("__divtc3_ieee128", div_fncode, fntype); + } } /* Emit a potentially record-form instruction, setting DST from SRC. @@ -23837,13 +23851,9 @@ rs6000_libgcc_floating_mode_supported_p (scalar_float_mode mode) case E_TFmode: return true; - /* We only return true for KFmode if IEEE 128-bit types are supported, and - if long double does not use the IEEE 128-bit format. If long double - uses the IEEE 128-bit format, it will use TFmode and not KFmode. - Because the code will not use KFmode in that case, there will be aborts - because it can't find KFmode in the Floatn types. */ + /* We only return true for KFmode if IEEE 128-bit types are supported. */ case E_KFmode: - return TARGET_FLOAT128_TYPE && !TARGET_IEEEQUAD; + return TARGET_FLOAT128_TYPE; default: return false; @@ -23877,7 +23887,7 @@ rs6000_floatn_mode (int n, bool extended) case 64: if (TARGET_FLOAT128_TYPE) - return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode; + return KFmode; else return opt_scalar_float_mode (); @@ -23901,7 +23911,7 @@ rs6000_floatn_mode (int n, bool extended) case 128: if (TARGET_FLOAT128_TYPE) - return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode; + return KFmode; else return opt_scalar_float_mode (); @@ -23919,7 +23929,7 @@ rs6000_c_mode_for_suffix (char suffix) if (TARGET_FLOAT128_TYPE) { if (suffix == 'q' || suffix == 'Q') - return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode; + return KFmode; /* At the moment, we are not defining a suffix for IBM extended double. If/when the default for -mabi=ieeelongdouble is changed, and we want diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index f942597c3b4..e17252bb8de 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -543,12 +543,6 @@ ; Iterator for 128-bit VSX types for pack/unpack (define_mode_iterator FMOVE128_VSX [V1TI KF]) -; Iterators for converting to/from TFmode -(define_mode_iterator IFKF [IF KF]) - -; Constraints for moving IF/KFmode. -(define_mode_attr IFKF_reg [(IF "d") (KF "wa")]) - ; Whether a floating point move is ok, don't allow SD without hardware FP (define_mode_attr fmove_ok [(SF "") (DF "") @@ -9075,6 +9069,15 @@ DONE; }) +(define_expand "extendkfif2" + [(set (match_operand:IF 0 "gpc_reg_operand") + (float_extend:IF (match_operand:KF 1 "gpc_reg_operand")))] + "TARGET_FLOAT128_TYPE" +{ + rs6000_expand_float128_convert (operands[0], operands[1], false); + DONE; +}) + (define_expand "extendtfkf2" [(set (match_operand:KF 0 "gpc_reg_operand") (float_extend:KF (match_operand:TF 1 "gpc_reg_operand")))] @@ -9111,6 +9114,15 @@ DONE; }) +(define_expand "trunckfif2" + [(set (match_operand:IF 0 "gpc_reg_operand") + (float_truncate:IF (match_operand:KF 1 "gpc_reg_operand")))] + "TARGET_FLOAT128_TYPE" +{ + rs6000_expand_float128_convert (operands[0], operands[1], false); + DONE; +}) + (define_expand "trunckftf2" [(set (match_operand:TF 0 "gpc_reg_operand") (float_truncate:TF (match_operand:KF 1 "gpc_reg_operand")))] @@ -9129,31 +9141,73 @@ DONE; }) -(define_insn_and_split "*extendtf2_internal" - [(set (match_operand:TF 0 "gpc_reg_operand" "=") +;; Convert between KFmode and TFmode when -mabi=ieeelongdouble +(define_insn_and_split "*extendkftf2_internal" + [(set (match_operand:TF 0 "gpc_reg_operand" "=wa,wa") (float_extend:TF - (match_operand:IFKF 1 "gpc_reg_operand" "")))] - "TARGET_FLOAT128_TYPE - && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (mode)" + (match_operand:KF 1 "gpc_reg_operand" "0,wa")))] + "FLOAT128_IEEE_P (TFmode)" "#" "&& reload_completed" [(set (match_dup 0) (match_dup 2))] { operands[2] = gen_rtx_REG (TFmode, REGNO (operands[1])); -}) +} + [(set_attr "type" "vecsimple")]) -(define_insn_and_split "*extendtf2_internal" - [(set (match_operand:IFKF 0 "gpc_reg_operand" "=") - (float_extend:IFKF - (match_operand:TF 1 "gpc_reg_operand" "")))] - "TARGET_FLOAT128_TYPE - && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (mode)" +(define_insn_and_split "*extendtfkf2_internal" + [(set (match_operand:KF 0 "gpc_reg_operand" "=wa,wa") + (float_extend:KF + (match_operand:TF 1 "gpc_reg_operand" "0,wa")))] + "FLOAT128_IEEE_P (TFmode)" "#" "&& reload_completed" [(set (match_dup 0) (match_dup 2))] { - operands[2] = gen_rtx_REG (mode, REGNO (operands[1])); -}) + operands[2] = gen_rtx_REG (KFmode, REGNO (operands[1])); +} + [(set_attr "type" "vecsimple")]) + +;; Convert between IFmode and TFmode when -mabi=ibmlongdouble +(define_insn_and_split "*extendiftf2_internal" + [(set (match_operand:TF 0 "gpc_reg_operand" "=d,&d") + (float_extend:TF + (match_operand:IF 1 "input_operand" "0,d")))] + "FLOAT128_IBM_P (TFmode)" + "#" + "&& reload_completed" + [(set (match_dup 2) (match_dup 3)) + (set (match_dup 4) (match_dup 5))] +{ + unsigned int op0_regno = reg_or_subregno (operands[0]); + unsigned int op1_regno = reg_or_subregno (operands[1]); + operands[2] = gen_rtx_REG (DFmode, op0_regno); + operands[3] = gen_rtx_REG (DFmode, op1_regno); + operands[4] = gen_rtx_REG (DFmode, op0_regno + 1); + operands[5] = gen_rtx_REG (DFmode, op1_regno + 1); +} + [(set_attr "type" "two") + (set_attr "num_insns" "2")]) + +(define_insn_and_split "*extendtfif2_internal" + [(set (match_operand:IF 0 "gpc_reg_operand" "=d,&d") + (float_extend:IF + (match_operand:TF 1 "input_operand" "0,d")))] + "FLOAT128_IBM_P (TFmode)" + "#" + "&& reload_completed" + [(set (match_dup 2) (match_dup 3)) + (set (match_dup 4) (match_dup 5))] +{ + unsigned int op0_regno = reg_or_subregno (operands[0]); + unsigned int op1_regno = reg_or_subregno (operands[1]); + operands[2] = gen_rtx_REG (DFmode, op0_regno); + operands[3] = gen_rtx_REG (DFmode, op1_regno); + operands[4] = gen_rtx_REG (DFmode, op0_regno + 1); + operands[5] = gen_rtx_REG (DFmode, op1_regno + 1); +} + [(set_attr "type" "two") + (set_attr "num_insns" "2")]) ;; Reload helper functions used by rs6000_secondary_reload. The patterns all diff --git a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c index e34ed40bac2..0cfcea837ed 100644 --- a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c +++ b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c @@ -14,4 +14,4 @@ divide (cld_t *p, cld_t *q, cld_t *r) *p = *q / *r; } -/* { dg-final { scan-assembler "bl __divkc3" } } */ +/* { dg-final { scan-assembler "bl __divtc3_ieee128" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c b/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c index eee6de9e2a5..78ef1dc00f0 100644 --- a/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c +++ b/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c @@ -14,4 +14,4 @@ multiply (cld_t *p, cld_t *q, cld_t *r) *p = *q * *r; } -/* { dg-final { scan-assembler "bl __mulkc3" } } */ +/* { dg-final { scan-assembler "bl __multc3_ieee128" } } */ diff --git a/libgcc/config/rs6000/float128-ifunc.c b/libgcc/config/rs6000/float128-ifunc.c index 73cbca2fc9a..30d46bcb233 100644 --- a/libgcc/config/rs6000/float128-ifunc.c +++ b/libgcc/config/rs6000/float128-ifunc.c @@ -359,3 +359,9 @@ TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype) TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype) __attribute__ ((__ifunc__ ("__divkc3_resolve"))); + +TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype) + __attribute__ ((__ifunc__ ("__mulkc3_resolve"))); + +TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype) + __attribute__ ((__ifunc__ ("__divkc3_resolve"))); diff --git a/libgcc/config/rs6000/quad-float128.h b/libgcc/config/rs6000/quad-float128.h index ae0622c744c..a684d0e1bcf 100644 --- a/libgcc/config/rs6000/quad-float128.h +++ b/libgcc/config/rs6000/quad-float128.h @@ -191,6 +191,11 @@ extern TFtype __trunctfkf2 (IBM128_TYPE); extern TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype); extern TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype); +/* Complex long double multiply/divide if long double uses the IEEE 128-bit + encoding. */ +extern TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype); +extern TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype); + /* Convert IEEE 128-bit floating point to/from string. We explicitly use _Float128 instead of TFmode because _strtokf and _strfromkf must be compiled with long double being IBM 128. */