[gcc r13-1906] PR target/106450: Tweak timode_remove_non_convertible_regs on x86_64.

[Roger Sayle <sayle@gcc.gnu.org>]

https://gcc.gnu.org/g:493f4e6cf081ea2d016547629b29d130c1533ccb

commit r13-1906-g493f4e6cf081ea2d016547629b29d130c1533ccb
Author: Roger Sayle <roger@nextmovesoftware.com>
Date:   Sun Jul 31 21:44:51 2022 +0100

    PR target/106450: Tweak timode_remove_non_convertible_regs on x86_64.
    
    This patch resolves PR target/106450, some more fall-out from more
    aggressive TImode scalar-to-vector (STV) optimizations.  I continue
    to be caught out by how far TImode STV has diverged from DImode/SImode
    STV, and therefore requires additional (unexpected) tweaking.  Many
    thanks to H.J. Lu for pointing out timode_remove_non_convertible_regs
    needs to be extended to handle XOR (and other new operations).
    
    Unhelpfully the comment above this function states that it's the TImode
    version of "remove_non_convertible_regs", which doesn't exist anymore,
    so I've resurrected an explanatory comment from the git history.
    By refactoring the checks for hard regs and already "marked" regs
    into timode_check_non_convertible_regs itself, all of its callers are
    simplified.  This patch then FOR_EACH_INSN_USE and FOR_EACH_INSN_DEF
    to generically handle arbitrary (non-move) instructions (including
    unary and binary operations), calling timode_check_non_convertible_regs
    on each TImode register USE and DEF.
    
    2022-07-31  Roger Sayle  <roger@nextmovesoftware.com>
                H.J. Lu  <hjl.tools@gmail.com>
    
    gcc/ChangeLog
            PR target/106450
            * config/i386/i386-features.cc (timode_check_non_convertible_regs):
            Do nothing if REGNO is set in the REGS bitmap, or is a hard reg.
            (timode_remove_non_convertible_regs): Update comment.
            Call timode_check_non_convertible_reg on all TImode register
            DEFs and USEs in each instruction.
    
    gcc/testsuite/ChangeLog
            PR target/106450
            * gcc.target/i386/pr106450.c: New test case.

Diff:
---
 gcc/config/i386/i386-features.cc         | 46 ++++++++++++++++++--------------
 gcc/testsuite/gcc.target/i386/pr106450.c | 14 ++++++++++
 2 files changed, 40 insertions(+), 20 deletions(-)

diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc
index aa5de714edb..e4cc4a30590 100644
--- a/gcc/config/i386/i386-features.cc
+++ b/gcc/config/i386/i386-features.cc
@@ -1808,6 +1808,11 @@ static void
 timode_check_non_convertible_regs (bitmap candidates, bitmap regs,
 				   unsigned int regno)
 {
+  /* Do nothing if REGNO is already in REGS or is a hard reg.  */
+  if (bitmap_bit_p (regs, regno)
+      || HARD_REGISTER_NUM_P (regno))
+    return;
+
   for (df_ref def = DF_REG_DEF_CHAIN (regno);
        def;
        def = DF_REF_NEXT_REG (def))
@@ -1843,7 +1848,13 @@ timode_check_non_convertible_regs (bitmap candidates, bitmap regs,
     }
 }
 
-/* The TImode version of remove_non_convertible_regs.  */
+/* For a given bitmap of insn UIDs scans all instructions and
+   remove insn from CANDIDATES in case it has both convertible
+   and not convertible definitions.
+
+   All insns in a bitmap are conversion candidates according to
+   scalar_to_vector_candidate_p.  Currently it implies all insns
+   are single_set.  */
 
 static void
 timode_remove_non_convertible_regs (bitmap candidates)
@@ -1857,25 +1868,20 @@ timode_remove_non_convertible_regs (bitmap candidates)
     changed = false;
     EXECUTE_IF_SET_IN_BITMAP (candidates, 0, id, bi)
       {
-	rtx def_set = single_set (DF_INSN_UID_GET (id)->insn);
-	rtx dest = SET_DEST (def_set);
-	rtx src = SET_SRC (def_set);
-
-	if ((!REG_P (dest)
-	     || bitmap_bit_p (regs, REGNO (dest))
-	     || HARD_REGISTER_P (dest))
-	    && (!REG_P (src)
-		|| bitmap_bit_p (regs, REGNO (src))
-		|| HARD_REGISTER_P (src)))
-	  continue;
-
-	if (REG_P (dest))
-	  timode_check_non_convertible_regs (candidates, regs,
-					     REGNO (dest));
-
-	if (REG_P (src))
-	  timode_check_non_convertible_regs (candidates, regs,
-					     REGNO (src));
+	rtx_insn *insn = DF_INSN_UID_GET (id)->insn;
+	df_ref ref;
+
+	FOR_EACH_INSN_DEF (ref, insn)
+	  if (!DF_REF_REG_MEM_P (ref)
+	      && GET_MODE (DF_REF_REG (ref)) == TImode)
+	    timode_check_non_convertible_regs (candidates, regs,
+					       DF_REF_REGNO (ref));
+
+	FOR_EACH_INSN_USE (ref, insn)
+	  if (!DF_REF_REG_MEM_P (ref)
+	      && GET_MODE (DF_REF_REG (ref)) == TImode)
+	    timode_check_non_convertible_regs (candidates, regs,
+					       DF_REF_REGNO (ref));
       }
 
     EXECUTE_IF_SET_IN_BITMAP (regs, 0, id, bi)
diff --git a/gcc/testsuite/gcc.target/i386/pr106450.c b/gcc/testsuite/gcc.target/i386/pr106450.c
new file mode 100644
index 00000000000..d16231f6abd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr106450.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-O2 -fsplit-paths" } */
+
+__int128 n;
+
+__attribute__ ((simd)) void
+foo (void)
+{
+  __int128 uninitialized;
+  unsigned __int128 *p = &n;
+
+  n >>= *p ? : 2;
+  n |= uninitialized;
+}