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From: Roger Sayle <sayle@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-1920] PR target/106481: Handle CONST_WIDE_INT in REG_EQUAL during STV on x86_64. Date: Mon, 1 Aug 2022 22:09:24 +0000 (GMT) [thread overview] Message-ID: <20220801220924.860C2385800D@sourceware.org> (raw) https://gcc.gnu.org/g:96e5f6696a1fa90493c464884984e9f1de86d817 commit r13-1920-g96e5f6696a1fa90493c464884984e9f1de86d817 Author: Roger Sayle <roger@nextmovesoftware.com> Date: Mon Aug 1 23:08:23 2022 +0100 PR target/106481: Handle CONST_WIDE_INT in REG_EQUAL during STV on x86_64. This patch resolves PR target/106481, and is an oversight in my recent battles with REG_EQUAL notes during TImode STV (see PR target/106278 https://gcc.gnu.org/pipermail/gcc-patches/2022-July/598416.html). The patch above's/current behaviour is that we check that the mode of the REG_EQUAL note is TImode before using PUT_MODE to set it to V1TImode. However, the new test case reveals that this doesn't consider REG_EQUAL notes that are CONST_INT or CONST_WIDE_INT, i.e. that are VOIDmode, and so STV produces: (insn 85 84 86 2 (set (reg:V1TI 113) (reg:V1TI 84)) "pr106481.c":13:3 1766 {movv1ti_internal} (expr_list:REG_EQUAL (const_wide_int 0x0ffffffff00000004) (nil))) which causes problems as the const_wide_int isn't a valid immediate constant for V1TImode. With this patch, we now generate the correct: (insn 85 84 86 2 (set (reg:V1TI 113) (reg:V1TI 84)) "pr106481.c":13:3 1766 {movv1ti_internal} (expr_list:REG_EQUAL (const_vector:V1TI [ (const_wide_int 0x0ffffffff00000004) ]) (nil))) 2022-08-01 Roger Sayle <roger@nextmovesoftware.com> Uroš Bizjak <ubizjak@gmail.com> gcc/ChangeLog PR target/106481 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn): Convert a CONST_SCALAR_INT_P in a REG_EQUAL note into a V1TImode CONST_VECTOR. gcc/testsuite/ChangeLog PR target/106481 * gcc.target/i386/pr106481.c: New test case. Diff: --- gcc/config/i386/i386-features.cc | 11 +++++++++-- gcc/testsuite/gcc.target/i386/pr106481.c | 17 +++++++++++++++++ 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc index e4cc4a30590..e3ecc22580a 100644 --- a/gcc/config/i386/i386-features.cc +++ b/gcc/config/i386/i386-features.cc @@ -1353,8 +1353,15 @@ timode_scalar_chain::convert_insn (rtx_insn *insn) if (GET_MODE (dst) == V1TImode) { tmp = find_reg_equal_equiv_note (insn); - if (tmp && GET_MODE (XEXP (tmp, 0)) == TImode) - PUT_MODE (XEXP (tmp, 0), V1TImode); + if (tmp) + { + if (GET_MODE (XEXP (tmp, 0)) == TImode) + PUT_MODE (XEXP (tmp, 0), V1TImode); + else if (CONST_SCALAR_INT_P (XEXP (tmp, 0))) + XEXP (tmp, 0) + = gen_rtx_CONST_VECTOR (V1TImode, + gen_rtvec (1, XEXP (tmp, 0))); + } } break; case MEM: diff --git a/gcc/testsuite/gcc.target/i386/pr106481.c b/gcc/testsuite/gcc.target/i386/pr106481.c new file mode 100644 index 00000000000..8cc704865cd --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr106481.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2 -fno-dce -fno-forward-propagate -fno-rerun-cse-after-loop -Wno-psabi" } */ + +typedef int V __attribute__((vector_size (64))); +typedef __int128 W __attribute__((vector_size (64))); + +W w; +V bar (void); + +void +foo (V v, W) +{ + foo ((V){4, ~0}, (W) v); + foo (v, w); + bar (); +} +
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