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From: Kewen Lin <linkw@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r10-10924] rs6000: Preserve REG_EH_REGION when replacing load/store [PR106091]
Date: Tue,  2 Aug 2022 03:53:40 +0000 (GMT)	[thread overview]
Message-ID: <20220802035340.C0E253857C41@sourceware.org> (raw)

https://gcc.gnu.org/g:a2ead00af2731e5551b15523ebf8f3e68c4e2ecb

commit r10-10924-ga2ead00af2731e5551b15523ebf8f3e68c4e2ecb
Author: Kewen Lin <linkw@linux.ibm.com>
Date:   Mon Jul 25 21:29:14 2022 -0500

    rs6000: Preserve REG_EH_REGION when replacing load/store [PR106091]
    
    As test case in PR106091 shows, rs6000 specific pass swaps
    doesn't preserve the reg_note REG_EH_REGION when replacing
    some load insn at the end of basic block, it causes the
    flow info verification to fail unexpectedly.  Since memory
    reference rtx may trap, this patch is to ensure we copy
    REG_EH_REGION reg_note while replacing swapped aligned load
    or store.
    
            PR target/106091
    
    gcc/ChangeLog:
    
            * config/rs6000/rs6000-p8swap.c (replace_swapped_aligned_store): Copy
            REG_EH_REGION when replacing one store insn having it.
            (replace_swapped_aligned_load): Likewise.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/powerpc/pr106091.c: New test.
    
    (cherry picked from commit f4286601933406142b46693660f7f4b682cb50a5)

Diff:
---
 gcc/config/rs6000/rs6000-p8swap.c           | 20 ++++++++++++++++++--
 gcc/testsuite/gcc.target/powerpc/pr106091.c | 15 +++++++++++++++
 2 files changed, 33 insertions(+), 2 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-p8swap.c b/gcc/config/rs6000/rs6000-p8swap.c
index 4a358646830..02f99ba5df7 100644
--- a/gcc/config/rs6000/rs6000-p8swap.c
+++ b/gcc/config/rs6000/rs6000-p8swap.c
@@ -1668,7 +1668,15 @@ replace_swapped_aligned_store (swap_web_entry *insn_entry,
   gcc_assert ((GET_CODE (new_body) == SET)
 	      && MEM_P (SET_DEST (new_body)));
 
-  set_block_for_insn (new_insn, BLOCK_FOR_INSN (store_insn));
+  basic_block bb = BLOCK_FOR_INSN (store_insn);
+  set_block_for_insn (new_insn, bb);
+  /* Handle REG_EH_REGION note.  */
+  if (cfun->can_throw_non_call_exceptions && BB_END (bb) == store_insn)
+    {
+      rtx note = find_reg_note (store_insn, REG_EH_REGION, NULL_RTX);
+      if (note)
+	add_reg_note (new_insn, REG_EH_REGION, XEXP (note, 0));
+    }
   df_insn_rescan (new_insn);
 
   df_insn_delete (store_insn);
@@ -1761,7 +1769,15 @@ replace_swapped_aligned_load (swap_web_entry *insn_entry, rtx swap_insn)
   gcc_assert ((GET_CODE (new_body) == SET)
 	      && MEM_P (SET_SRC (new_body)));
 
-  set_block_for_insn (new_insn, BLOCK_FOR_INSN (def_insn));
+  basic_block bb = BLOCK_FOR_INSN (def_insn);
+  set_block_for_insn (new_insn, bb);
+  /* Handle REG_EH_REGION note.  */
+  if (cfun->can_throw_non_call_exceptions && BB_END (bb) == def_insn)
+    {
+      rtx note = find_reg_note (def_insn, REG_EH_REGION, NULL_RTX);
+      if (note)
+	add_reg_note (new_insn, REG_EH_REGION, XEXP (note, 0));
+    }
   df_insn_rescan (new_insn);
 
   df_insn_delete (def_insn);
diff --git a/gcc/testsuite/gcc.target/powerpc/pr106091.c b/gcc/testsuite/gcc.target/powerpc/pr106091.c
new file mode 100644
index 00000000000..61ce8cf4733
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr106091.c
@@ -0,0 +1,15 @@
+/* { dg-options "-O -fnon-call-exceptions -fno-tree-dce -fno-tree-forwprop -w" } */
+
+/* Verify there is no ICE.  */
+
+typedef short __attribute__ ((__vector_size__ (64))) V;
+V v, w;
+
+inline V foo (V a, V b);
+
+V
+foo (V a, V b)
+{
+  b &= v < b;
+  return (V){foo (b, w)[3], (V){}[3]};
+}


                 reply	other threads:[~2022-08-02  3:53 UTC|newest]

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