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From: Andrew Pinski <pinskia@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-1970] [RSIC-V] Fix 32bit riscv with zbs extension enabled Date: Fri, 5 Aug 2022 02:43:09 +0000 (GMT) [thread overview] Message-ID: <20220805024309.EF4C03858016@sourceware.org> (raw) https://gcc.gnu.org/g:ffe4f55aa1bb18cc2793a4335450f34c33c9d01c commit r13-1970-gffe4f55aa1bb18cc2793a4335450f34c33c9d01c Author: Andrew Pinski <apinski@marvell.com> Date: Thu Aug 4 19:34:55 2022 -0700 [RSIC-V] Fix 32bit riscv with zbs extension enabled The problem here was a disconnect between splittable_const_int_operand predicate and the function riscv_build_integer_1 for 32bits with zbs enabled. The splittable_const_int_operand predicate had a check for TARGET_64BIT which was not needed so this patch removed it. Committed as obvious after a build for risc32-elf configured with --with-arch=rv32imac_zba_zbb_zbc_zbs. Thanks, Andrew Pinski gcc/ChangeLog: * config/riscv/predicates.md (splittable_const_int_operand): Remove the check for TARGET_64BIT for single bit const values. Diff: --- gcc/config/riscv/predicates.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md index 90db5dfcdd5..e98db2cb574 100644 --- a/gcc/config/riscv/predicates.md +++ b/gcc/config/riscv/predicates.md @@ -76,7 +76,7 @@ /* Check whether the constant can be loaded in a single instruction with zbs extensions. */ - if (TARGET_64BIT && TARGET_ZBS && SINGLE_BIT_MASK_OPERAND (INTVAL (op))) + if (TARGET_ZBS && SINGLE_BIT_MASK_OPERAND (INTVAL (op))) return false; /* Otherwise check whether the constant can be loaded in a single
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